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參數(shù)資料
| 型號： | IN74HC221AN |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | DUAL MONOSTABLE MULTIVIBRATOR |
| 中文描述： | 雙單穩(wěn)態(tài)觸發(fā)器 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 283K |
| 代理商： | IN74HC221AN |
IN74HC221A
2
MAXIMUM RATINGS
*
Symbol
V
CC
DC Supply Voltage (Referenced to GND)
V
IN
DC Input Voltage (Referenced to GND)
V
OUT
DC Output Voltage (Referenced to GND)
I
IN
DC Input Current, per Pin
Parameter
Value
-0.5 to +7.0
-1.5 to V
CC
+1.5
-0.5 to V
CC
+0.5
±
20
±
30
±
25
±
50
750
500
-65 to +150
260
Unit
V
V
V
mA
A
,
B
,
RESET
C
EXT
, R
EXT
I
OUT
I
CC
P
D
DC Output Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation in Still Air, Plastic DIP
**
SOIC Package
**
Storage Temperature
Lead Temperature, 1 mm from Case for 10
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
**
Derating - Plastic DIP: - 10 mW/
°
C from 65
°
to 125
°
C
SOIC Package: : - 7 mW/
°
C from 65
°
to 125
°
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V
CC
DC Supply Voltage (Referenced to GND)
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to
GND)
T
A
Operating Temperature, All Package Types
Input Rise and Fall Time -
RESET
(Figure 2)
mA
mA
mW
Tstg
T
L
°
C
°
C
Min
3.0
*
0
Max
6.0
V
CC
Unit
V
V
-55
0
0
0
-
+125
1000
500
400
No
Limit
1000
1000
No
Limit
°
C
ns
V
CC
=2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
t
r
, t
f
A
A
or
B
R
X
External Timing Resistor
V
CC
<4.5 V
V
CC
≥
4.5 V
10
2.0
0
k
C
X
External Timing Capacitor
μ
F
*
The IN74HC221 will function at 2.0 V but for optimum pulse width stability, V
CC
should be above
3.0 V.
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and
V
OUT
should be constrained to the range GND
≤
(V
IN
or V
OUT
)
≤
V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
V
CC
). Unused outputs must be left open.
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