參數(shù)資料
型號(hào): IN74HC299DW
廠商: INTEGRAL JOINT STOCK COMPANY
英文描述: 8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O
中文描述: 8位雙向通用移位寄存器與并行I / O
文件頁(yè)數(shù): 4/8頁(yè)
文件大?。?/td> 194K
代理商: IN74HC299DW
IN74HC299
4
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
Symbol
Parameter
V
CC
V
Guaranteed Limit
25
°
C
to
-55
°
C
5.0
25
29
24
170
34
29
37
160
32
27
34
175
35
30
37
190
38
32
41
150
30
26
33
150
30
26
33
60
12
10
13
75
15
13
16
10
10
15
15
85
°
C
125
°
C
Unit
f
max
Maximum Clock Frequency (50% Duty
Cycle) (Figures 1 and 5)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
-
-
4.0
20
3.4
17
20
255
51
43
240
48
41
265
53
45
285
57
48
225
45
38
225
45
38
90
18
15
110
22
19
10
15
MHz
t
PLH
,
t
PHL
Maximum Propagation Delay, Clock to
Q
A
’ or Q
H
’ (Figures 1 and 5)
215
43
ns
t
PLH
,
t
PHL
Maximum Propagation Delay, Clock to
Q
A
thru Q
H
(Figures 1 and 5)
200
40
ns
t
PHL
Maximum Propagation Delay, Reset to
Q
A
’ or Q
H
’ (Figures 2 and 5)
220
44
ns
t
PHL
Maximum Propagation Delay, Reset to
Q
A
thru Q
H
(Figures 2 and 5)
240
48
ns
t
PLZ
,
t
PHZ
Maximum Propagation Delay , OE1,
OE2, S1, or S2 to Q
A
thru Q
H
(Figures 3
and 6)
Maximum Propagation Delay , OE1,
OE2, S1, or S2 to Q
A
thru Q
H
(Figures 3
and 6)
t
TLH
, t
THL
Maximum Output Transition Time, Q
A
thru Q
H
(Figures 1 and 5)
190
38
ns
t
PZL
,
t
PZH
190
38
ns
75
15
ns
t
TLH
, t
THL
Maximum Output Transition Time, Q
A
thru Q
H
(Figures 1 and 5)
95
19
ns
C
IN
C
OUT
Maximum Input Capacitance)
Maximum Three-State I/O Capacitance
(I/O in High-Impedance State), Q
A
thru
Q
H
pF
pF
Power Dissipation Capacitance (Per
Package), Output Enable
Used to determine the no-load dynamic
power
P
D
=C
PD
V
CC
Typical @25
°
C,V
CC
=5.0 V
C
PD
consumption:
2
f+I
CC
V
CC
240
pF
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