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參數(shù)資料
| 型號： | INA102AU |
| 英文描述： | 680K 1% 100PPM TKF |
| 中文描述： | 低功耗儀表放大器 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 173K |
| 代理商： | INA102AU |
Other gains between 1 and 10, 10 and 100, and 100 and 1000
can also be obtained by connecting an external resistor
between pin 6 and either pin 2, 3, or 4, respectively (see
Figure 6 for application).
G = 1 + (40/R
G
) where R
G
is the total resistance between the
two inverting inputs of the input op amps. At high gains,
where the value of R
G
becomes small, additional resistance
(i.e., relays or sockets) in the R
G
circuit will contribute to a
gain error. Care should be taken to minimize this effect.
OPTIONAL OFFSET ADJUSTMENT PROCEDURE
It is sometimes desirable to null the input and/or output offset
to achieve higher accuracy. The quality of the potentiometer
will affect the results; therefore, choose one with good
temperature and mechanical-resistance stability.
The optional offset null capabilities are shown in Figure 3. R
4
adjustment affects only the input stage component of the
offset voltage. Note that the null condition will be disturbed
when the gain is changed. Also, the input drift will be
affected by approximately 0.31
μ
V/
°
C per 100
μ
V of input
offset voltage that is trimmed. Therefore, care should be
taken when considering use of the control for removal of
other sources of offset. Output offset correction can be
accomplished with A
1
, R
1
, R
2
, and R
3
, by applying a voltage
to Common (pin 10) through a buffer amplifier. This buffer
limits the resistance in series with pin 10 to minimize CMR
error. Resistance above 0.1
will cause the common-mode
rejection to fall below 100dB. Be certain to keep this resist-
ance low.
INA102
–V
CC
10
1M
OPA27
A
1
1
16
R
2
1k
R
1
100k
Output Offset
Adjust
+15VDC
–15VDC
R
±15mV adjustment at the output.
R
4
100k
Input Offset Adjust
FIGURE 3. Optional Offset Nulling.
It is important to not exceed the input amplifiers’ dynamic
range. The amplified differential input signal and its associ-
ated common-mode voltage should not cause the output of
A
1
or A
2
to exceed approximately
±
12V with
±
15V supplies,
or nonlinear operation will result. To protect against mois-
ture, especially in high gain, sealing compound may be used.
Current injected into the offset pins should be minimized.
OPTIONAL FILTERING
The INA102 has provisions for accomplishing filtering with
one external capacitor between pins 11 and 13. This single-
pole filter can be used to reduce noise outside the signal
bandwidth, but with some degradation to AC CMR.
When it is important to preserve CMR versus frequency
(especially at 60Hz), two capacitors should be used. The
additional capacitor is connected between pins 8 and 10. This
will maintain a balance of impedances in the output stage.
Either of these capacitors could also be trimmed slightly, to
maximize CMR, if desired. Note that their ratio tracking will
affect CMR over temperature.
OPTIONAL COMMON-MODE REJECTION TRIM
The INA102 is laser-adjusted during manufacturing to assure
high CMR. However, if desired, a small resistance can be
added in series with pin 10 to trim the CMR to an improved
level. Depending upon the nature of the internal imbalances,
either positive or negative resistance value could be required.
The circuit shown in Figure 4 acts as a bipolar potentiometer
and allows easy adjustment of CMR.
FIGURE 4. Optional Circuit for Externally Trimming CMR.
TYPICAL APPLICATIONS
Many applications of instrumentation amplifiers involve the
amplification of low-level differential signals from bridges
and transducers such as strain gages, thermocouples, and
RTDs. Some of the important parameters include common-
mode rejection (differential cancellation of common-mode
offset and noise, see Figure 1), input impedance, offset
voltage and drift, gain accuracy, linearity, and noise. The
INA102 accomplishes all of these with high precision at
surprisingly low quiescent current. However, in higher gains
(>100), the bias current can cause a large offset error at the
output. This can saturate the output unless the source imped-
ance is separated, e.g., two 500k
paths instead of one 1M
unbalanced input. Figures 5 through 16 show some typical
applications circuits.
1k
OPA177
1k
20
CMR
Adjust
1k
1k
INA102
Procedure:
1. Connect CMV to both inputs.
2. Adjust potentiometer for near zero at the output.
10
Common
~
e
CM
15
14
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