參數(shù)資料
型號: IPB100N08S2L-07
廠商: INFINEON TECHNOLOGIES AG
英文描述: OptiMOS㈢ Power-Transistor
中文描述: 的OptiMOS㈢功率晶體管
文件頁數(shù): 3/8頁
文件大?。?/td> 164K
代理商: IPB100N08S2L-07
IPB100N08S2L-07
IPP100N08S2L-07
Parameter
Symbol
Conditions
Unit
min.
typ.
max.
Dynamic characteristics
2)
Input capacitance
C
iss
-
5400
-
pF
Output capacitance
C
oss
-
1300
-
Reverse transfer capacitance
C
rss
-
590
-
Turn-on delay time
t
d(on)
-
19
-
ns
Rise time
t
r
-
56
-
Turn-off delay time
t
d(off)
-
85
-
Fall time
t
f
-
22
-
Gate Charge Characteristics
2)
Gate to source charge
Q
gs
-
18
25
nC
Gate to drain charge
Q
gd
-
70
124
Gate charge total
Q
g
-
182
246
Gate plateau voltage
V
plateau
-
3.5
-
V
Reverse Diode
Diode continous forward current
2)
I
S
-
-
100
A
Diode pulse current
2)
I
S,pulse
-
-
400
Diode forward voltage
V
SD
V
GS
=0 V,
I
F
=80 A,
T
j
=25 °C
-
0.9
1.3
V
Reverse recovery time
2)
t
rr
V
R
=40 V,
I
F
=
I
S
,
d
i
F
/d
t
=100 A/μs
-
95
120
ns
Reverse recovery charge
2)
Q
rr
V
R
=40 V,
I
F
=
I
S
,
d
i
F
/d
t
=100 A/μs
-
240
300
nC
2)
Defined by design. Not subject to production test.
3)
See diagram 13
4)
Qualified at -20V and +20V.
5)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 μm thick) copper area for drain
connection. PCB is vertical in still air.
1)
Current is limited by bondwire; with an
R
thJC
= 0.5K/W the chip is able to carry 138A at 25°C. For detailed
information see Application Note ANPS071E at
www.infineon.com/optimos
T
C
=25 °C
Values
V
GS
=0 V,
V
DS
=25 V,
f
=1 MHz
V
DD
=40 V,
V
GS
=10 V,
I
D
=100 A,
R
G
=1.1
V
DD
=60 V,
I
D
=100 A,
V
GS
=0 to 10 V
Rev. 1.0
page 3
2006-03-03
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