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參數(shù)資料
| 型號： | IPDH6N03LAG |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | OptiMOS㈢2 Power-Transistor |
| 中文描述： | 的OptiMOS㈢2功率晶體管 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大小： | 428K |
| 代理商： | IPDH6N03LAG |
IPDH6N03LA G IPFH6N03LA G
IPSH6N03LA G IPUH6N03LA G
Parameter
Symbol Conditions
Unit
min.
typ.
max.
Dynamic characteristics
Input capacitance
C
iss
-
1800
2390
pF
Output capacitance
C
oss
-
690
920
Reverse transfer capacitance
C
rss
-
85
130
Turn-on delay time
t
d(on)
-
6
9
ns
Rise time
t
r
-
5.4
8
Turn-off delay time
t
d(off)
-
23
34
Fall time
t
f
-
4.2
6.3
Gate Charge Characteristics
6)
Gate to source charge
Q
gs
-
5.9
7.8
nC
Gate charge at threshold
Q
g(th)
-
2.9
3.8
Gate to drain charge
Q
gd
-
4.1
6.1
Switching charge
Q
sw
-
7.1
10
Gate charge total
Q
g
-
14
19
Gate plateau voltage
V
plateau
-
3.3
-
V
Gate charge total, sync. FET
Q
g(sync)
V
DS
=0.1 V,
V
GS
=0 to 5 V
-
13
17
nC
Output charge
Q
oss
V
DD
=15 V,
V
GS
=0 V
-
15
20
Reverse Diode
Diode continous forward current
I
S
-
-
50
A
Diode pulse current
I
S,pulse
-
-
350
Diode forward voltage
V
SD
V
GS
=0 V,
I
F
=50 A,
T
j
=25 °C
-
0.93
1.2
V
Reverse recovery charge
Q
rr
V
R
=15 V,
I
F
=
I
S
,
d
i
F
/d
t
=400 A/μs
-
-
10
nC
6)
See figure 16 for gate charge parameter definition
T
C
=25 °C
Values
V
GS
=0 V,
V
DS
=15 V,
f
=1 MHz
V
DD
=15 V,
V
GS
=10 V,
I
D
=25 A,
R
G
=2.7
V
DD
=15 V,
I
D
=25 A,
V
GS
=0 to 5 V
Rev. 1.3
page 3
2006-05-11
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