參數(shù)資料
型號(hào)： IQ80C154-30
英文描述： CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller
中文描述： 的CMOS 0至36 MHz的單芯片8位微控制器
文件頁(yè)數(shù)： 5/24頁(yè)
文件大?。?/td> 354K
代理商： IQ80C154-30
Rev.F (14 Jan. 97)
5
MATRA MHS
the address during accesses to external memory. ALE is
activated as though for this purpose at a constant rate of
1/6 the oscillator frequency except during an external
data memory access at which time one ALE pulse is
Address Latch Enable output for latching the low byte of
drive CMOS inputs without an external pullup.
PSEN
Program Store Enable output is the read strobe to external
Program Memory. PSEN is activated twice each machine
cycle during fetches from external Program Memory.
(However, when executing out of external Program
Memory, two activations of PSEN are skipped during
each access to external Data Memory). PSEN is not
activated during fetches from internal Program Memory.
PSEN can sink/source 8 LS TTL inputs. It can drive
CMOS inputs without an external pullup.
EA
When EA is held high, the CPU executed out of internal
Program Memory (unless the Program Counter exceeds
3FFFH). When EA is held low, the CPU executes only out
of external Program Memory. EA must not be floated.
Output of the inverting amplifier that forms the oscillator,
and input to the internal clock generator. This pin should
be floated when an external oscillator is used.
Idle and Power Down Operation
Figure 3
shows the internal Idle and Power Down clock
configuration. As illustrated, Power Down operation
stops the oscillator. The interrupt, serial port, and timer
blocks continue to function only with external clock
(INT0, INT1, T0, T1).
Figure 3. Idle and Power Down Hardware.
Idle Mode operation allows the interrupt, serial port, and
timer blocks to continue to function with internal or
external clocks, while the clock to CPU is gated off. The
special modes are activated by software via the Special
Function Register, PCON. Its hardware address is 87H.
PCON is not bit addressable.
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