參數(shù)資料
型號： IQ80C52EXXX-12D
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQFP44
封裝： CERAMIC, QFP-44
文件頁數(shù)： 15/108頁
文件大小： 3682K
代理商： IQ80C52EXXX-12D
14
8069R–AVR–06/2013
XMEGA A4
Not recommended for new designs -
Use XMEGA A4U series
7.7
Flash and EEPROM Page Size
The Flash Program Memory and EEPROM data memory are organized in pages. The pages are
word accessible for the Flash and byte accessible for the EEPROM.
Table 7-2 on page 14 shows the Flash Program Memory organization. Flash write and erase
operations are performed on one page at a time, while reading the Flash is done one byte at a
time. For Flash access the Z-pointer (Z[m:n]) is used for addressing. The most significant bits in
the address (FPAGE) give the page number and the least significant address bits (FWORD)
give the word in the page.
Table 7-2.
Number of words and Pages in the Flash.
Table 7-3 on page 14 shows EEPROM memory organization for the XMEGA A4 devices.
EEPROM write and erase operations can be performed one page or one byte at a time, while
reading the EEPROM is done one byte at a time. For EEPROM access the NVM Address Regis-
ter (ADDR[m:n]) is used for addressing. The most significant bits in the address (E2PAGE) give
the page number and the least significant address bits (E2BYTE) give the byte in the page.
Table 7-3.
Number of Bytes and Pages in the EEPROM.
Devices
Flash
Page Size
FWORD
FPAGE
Application
Boot
Size
(words)
Size
No of Pages
Size
No of Pages
ATxmega16A4
16 KB + 4 KB
128
Z[6:0]
Z[13:7]
16 KB
64
4 KB
16
ATxmega32A4
32 KB + 4 KB
128
Z[6:0]
Z[14:7]
32 KB
128
4 KB
16
ATxmega64A4
64 KB + 4 KB
128
Z[6:0]
Z[15:7]
64 KB
128
4 KB
16
ATxmega128A4
128 KB + 8 KB
256
Z[7:0]
Z[16:8]
128 KB
256
8 KB
16
Devices
EEPROM
Page Size
E2BYTE
E2PAGE
No of Pages
Size
(Bytes)
ATxmega16A4
1 KB
32
ADDR[4:0]
ADDR[10:5]
32
ATxmega32A4
1 KB
32
ADDR[4:0]
ADDR[10:5]
32
ATxmega64A4
2 KB
32
ADDR[4:0]
ADDR[10:5]
64
ATxmega128A4
2 KB
32
ADDR[4:0]
ADDR[10:5]
64
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