參數資料
    型號: IR1152STRPBF
    廠商: International Rectifier
    文件頁數: 10/20頁
    文件大?。?/td> 293K
    描述: IC PFC ONE CYCLE CONTROL 8SOIC
    特色產品: International Rectifier - uPFC? Power Factor Correction Ics
    標準包裝: 1
    模式: 連續(xù)導電(CCM)
    頻率 - 開關: 66kHz
    電流 - 啟動: 26µA
    電源電壓: 14 V ~ 17 V
    工作溫度: -25°C ~ 125°C
    安裝類型: 表面貼裝
    封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
    供應商設備封裝: 8-SOIC
    包裝: 標準包裝
    其它名稱: IR1152STRPBFDKR
     
    IR1152S
     
     
    www.irf.com
    10 
    ?2011 International Rectifier
     
    IR1152 Pin Description
    Pin COM: This is ground potential pin of the IC.   
    All internal devices are referenced to this point.
     
    Pin COMP:  External  circuitry  from  this  pin  to 
    ground compensates the system voltage loop and
    programs the soft start time. The COMP pin is
    essentially the output of the voltage error amplifier.
    The voltage loop error signal V
    m
     used in the control
    algorithm is derived from V
    COMP
      (V
    m
      =V
    COMP
    
    V
    COMP,START
    ). V
    COMP
     is actively discharged using an
    internal resistance to below V
    COMP,START
      threshold
    whenever the IC is pushed into Stand-by mode
    (BOP or OLP condition) or UVLO/Sleep mode. The
    gate drive output and logic functions of the IC are
    inactive if VCOMP is less than V
    COMP,START
    . Also
    during start-up, the VCOMP voltage has to be less
    than V
    COMP,START
      in order to commence operation
    (i.e. a pre-bias on VCOMP will not allow IC to
    commence operation).
     
    Pin ISNS:  ISNS  pin  is  tied  to  the  input  of  the 
    current sense amplifier of the IC. The voltage at
    this   pin,   which   provides   the   current   sense
    information to the IC, has to be a negative voltage
    wrt the COM pin. Also since the IC is based on
    average current mode, the entire inductor current
    information is necessary. A current sense resistor,
    located below system ground along the return path
    to the bridge rectifier, is the preferred current
    sensing method. ISNS pin is also the inverting input
    to the cycle-by-cycle peak current limit comparator.
    Whenever V
    ISNS
      exceeds V
    ISNS(PK)
      threshold in
    magnitude,   the   gate   drive   is   instantaneously
    disabled. Any external filtering of the ISNS pin must
    be performed carefully in order to ensure that the
    integrity of the current sense signal is maintained
    for cycle-by-cycle peak current limit protection.
     
    Pin BOP (Brown-out Protection): This pin is used 
    to sense the rectified AC input line voltage through
    a resistor divider/capacitor network which is in
    effect a voltage division and averaging network,
    representing a scaled down signal of the average
    rectified input voltage (average DC voltage + 2xf
    AC
     
    ripple). During start-up the BOP pin voltage has to
    exceed V
    BOP(EN)
      in order to enable the IC to exit
    Stand-by mode and enter normal operation. A
    Brown-out situation is detected whenever the pin
    voltage falls below V
    BOP
     and the IC is pushed into
    Stand-by mode. Subsequently the pin has to
    exceed V
    BOP(EN)
      for the IC to exit Stand-by and
    resume normal operation.
     
    Pin OVP/EN: The OVP/EN pin is connected to the 
    non-inverting input of the OVP(OVP) overvoltage
    comparator shown in the block diagram and thus is
    used to detect output overvoltage situations. The
    output voltage information is communicated to the
    OVP pin using a resistive divider. This pin also
    serves the second purpose of an ENABLE pin. The
    OVP/EN pin can be used to activate the IC into
    micropower sleep mode by pulling the voltage on
    this pin below the VSLEEP threshold. The OVP/EN
    pin can be used to activate the IC into micropower
    sleep mode by pulling the voltage on this pin below
    the V
    SLEEP
     threshold.
     
    Pin VFB: The  converter  output  voltage  is  sensed 
    via a resistive divider and fed into this pin. VFB pin
    is the inverting input of the output voltage error
    amplifier. The non-inverting input of this amplifier is
    connected   to   an   internal   5V   reference.   The
    impedance of the divider string must be low enough
    that it does not introduce substantial error due to the
    input bias currents of the amplifier, yet high enough
    to minimize power dissipation. Typical value of
    external divider impedance will be 2M&. The VFB
    pin is also connected to the non-inverting input of
    the OVP(VFB) overvoltage comparator as shown in
    the block diagram and is used to detect output
    overvoltage situations. Finally, VFB pin is also the
    inverting input to the Open Loop comparator. The IC
    is held in Stand-by Mode whenever VFB pin voltage
    is below VOLP threshold. IC current consumption is
    a few mA in this mode.
     
    Pin VCC: This is the supply voltage pin of the IC 
    and sense node for the undervoltage lock out circuit.
    It is possible to turn off the IC by pulling this pin
    below the minimum turn off threshold voltage,
    VCC(UVLO) without damage to the IC. This pin is
    not internally clamped.
     
    Pin GATE: This is the gate drive output of the IC.  
    This drive voltage is internally clamped to 13V(Typ)
    and provides a drive current of ?.75A peak with
    matched rise and fall times.
     
     
     
     
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