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5
IR2136(2)(3)(5)(6)(7)(8)(J&S)
& (PbF)
VCC
<UVCC
15V <UVBS
15V
15V
15V
VBS
X
ITRIP
X
0V
0V
>VITRIP
0V
ENABLE
X
5V
5V
5V
0V
FAULT
0 (note 1)
high imp
high imp
0 (note 2)
high imp
LO1,2,3
HO1,2,3
0
0
HIN1,2,3
0
LIN1,2,3
LIN1,2,3
15V
15V
15V
0
0
0
0
Note:
A shoot-through prevention logic prevents LO1,2,3 and HO1,2,3 for each channel from turning on simultaneously.
Note 1:
UVCC is not latched, when VCC>UVCC, FAULT returns to high impedance.
Note 2:
When ITRIP <V
ITRIP
, FAULT returns to high-impedance after RCIN pin becomes greater than 8V (@ VCC = 15V)
NOTE: For high side PWM, HIN pulse width must be
≥ 1μ
sec
Dynamic Electrical Characteristics
V
CC
= V
BS
= V
BIAS
= 15V, V
S1,2,3
= V
SS
= COM, TA = 25
o
C and C
L
= 1000 pF unless otherwise specified.
Symbol
Definition
Min. Typ.
ton
Turn-on propagation delay IR2136(2)(3)(5)(8)
IR21366(7)
toff
Turn-off propagation delay
IR2136(2)(3)(5)(8)
IR21366(7)
tr
Turn-on rise time
tf
Turn-off fall time
tEN
ENABLE low to output
IR2136(2)(3)(5)(8)
shutdown propagation delay IR21366(7)
tITRIP
ITRIP to output shutdown propagation delay
tbl
ITRIP blanking time
Max. Units Test Conditions
550
—
550
—
190
75
600
V
IN,
V
EN
= 0V or 5V
400
1000
—
300
—
250
—
—
—
300
100
500
100
425
250
400
180
125
50
450
250
750
150
V
ITRIP
= 5V
V
IN
= 0V or 5V
V
ITRIP
= 5V
V
IN
= 0V or 5V
V
ITRIP
= 5V
V
IN
= 0 & 5V
tFLT
ITRIP to FAULT propagation delay
400
600
800
tFILIN
Input filter time (HIN, LIN, EN)
(IR2136(2)(3)(5)(8) only)
FAULT clear time RCIN: R=2meg, C=1nF
100
200
—
tFLTCLR
1.3
1.65
2
mS
V
IN
= 0V or 5V
V
ITRIP
= 0V
V
IN
= 0 & 5V
External dead
time
>400nsec
DT
MT
MDT
Deadtime
Matching delay ON and OFF
Matching delay, max (ton,toff) - min (ton,toff),
(ton,toff are applicable to all 3 channels)
220
—
—
290
40
25
360
75
70
PM
Output pulse width matching, PWin -PWout (fig.2)
—
40
75
nS
V
IN
= 0 & 5V
nS