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參數(shù)資料
| 型號： | IR21381Q |
| 廠商： | International Rectifier |
| 英文描述： | 3-PHASE AC MOTOR CONTROLLER IC |
| 中文描述： | 3相AC電機(jī)控制IC |
| 文件頁數(shù)： | 19/30頁 |
| 文件大?。?/td> | 1133K |
| 代理商： | IR21381Q |
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IR22381Q
PBF
/IR21381Q
(
P
b
F
)
19
1
FEATURES DESCRIPTION
1.1
Start-up sequence
Device starts in FAULT condition at power-up
unless FAULT clear condition is forced (i.e.
LIN1=LIN2=LIN3=0 for at least t
FLTCLR
– in this
case FAULT is asserted for t
fltclr
, then resets).
In FAULT condition driver outputs are insensitive
to inputs: any noise on input pins is then rejected
during system power-up.
As soon as the controller awakes, a FAULT clear
action can be taken to enter the normal operating
condition.
1.2
Normal operation mode
After clearing FAULT condition and supplies are
stable the device becomes fully operative (see
grey blocks in the State Diagram).
HIN/N
1,2,3
, LIN
1,2,3
and BRIN/N produce driver
outputs to switch accordingly, while the input logic
checks the input signals preventing shoot-through
events and including Dead-time (DT).
1.3
Shut down
system
controller
command the Shutdown through the 3.3 V
compatible CMOS I/O SD pin. This event is not
latched.
The
can
asynchronously
1.4
Fault management
IR22381 is able to manage both the supply failure
(undervoltage lockout on both low and high side
circuits) and the desaturation of power transistors
connected to its drivers outputs.
1.4.1
The Undervoltage protection function disables the
output stage of each driver preventing the power
device being driven with too low voltages.
Both the low side (V
CC
supplied) and the floating
side (V
BS
supplied) are controlled by a dedicate
undervoltage function.
Undervoltage
event
on
V
CC
< UV
VCC-
) generates a diagnostic signal by
Undervoltage (UV)
the
V
CC
(when
forcing FAULT pin low (see FAULT section and
Figure 20). This event disables both low side and
floating drivers and the diagnostic signal holds until
the under voltage condition is over. Fault condition
is not latched and the FAULT pin is released once
V
CC
becomes higher than UV
VCC+
.
The undervoltage on the V
BS
works disabling only
the floating driver. Undervoltage on V
BS
does not
prevent the low side driver to activate its output nor
generate diagnostic signals. V
BS
undervoltage
condition (V
BS
< UV
VBS-
) latches the high side
output stage in the low state. V
BS
must be
reestablished higher than UV
VBS+
to return in
normal operating mode. To turn on the floating
driver H
IN
must be re-asserted high (rising edge
event on H
IN
is required).
1.4.2
Different causes can generate a power inverter
failure: phase and/or rail supply short-circuit,
overload conditions induced by the load, etc… In
all these fault conditions a large current increase is
produced in the IGBT.
The IR22381/IR21381 fault detection circuit
monitors the IGBT emitter to collector voltage (V
CE
)
by means of an external high voltage diode. High
current in the IGBT may cause the transistor to
desaturate, i.e. V
CE
to increase.
Once in desaturation, the current in power
transistor can be as high as 10 times the nominal
current. Whenever the transistor is switched off,
this high current generates relevant voltage
transients in the power stage that need to be
smoothed out in order to avoid destruction (by
over-voltages). The IR22381/IR21381 gate driver
accomplish the transients control by smoothly
turning off the desaturated transistor by means of
the LON pin activating a so called
Soft ShutDown
sequence (SSD).
4.2 Power devices desaturation
1.4.3
Desaturation detection: DSH/L and
DSB pin function
Figure 19 shows the structure of the desaturation
sensing
and
soft
shutdown
configuration is the same for both high and low
side output stages.
block.
This
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