參數(shù)資料
型號： IR3082MTR
廠商： International Rectifier
英文描述： XPHASE AMD OPTERON/ATHLON 64 CONTROL IC
中文描述： XPHASE AMD皓龍/速龍64控制IC
文件頁數(shù)： 11/33頁
文件大?。?/td> 444K
代理商： IR3082MTR
IR3082
Page 11 of 11
12/17/04
IR3082 THEORY OF OPERATION
Block Diagram
The Block diagram of the IR3082 is shown in figure 7 and discussed in the following sections.
+
+
-
DISABLE
EAOUT
FB
ERROR
AMP
IFB
-
ISINK
ISOURCE
VDAC
BUFFER
AMP
+
"FAST"
VDAC
+
-
+
-
DISCHG
OC
IROSC
IROSC
IROSC
+
-
VBIAS
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
1.270V
1.205V
+
-
+
-
+
-
+
-
+
-
ENABLE
VOSNS-
IIN
OCSET
VID1
VID0
VCC
LGND
ROSC
VID2
VDAC
RMPOUT
SS/DEL
PWRGD
VDRP
VBIAS
VID4
VID3
+
-
+
-
6uA
50%
DUTY
CYCLE
ON
1.24V
IDISCHG
1.0V
CURRENT
SOURCE
GENERATOR
RAMP GENERATOR
66uA
ON
SS/DEL
DISCHARGE
OC
COMPARATOR
7.0V
VCHG
3.9V
SOFTSTART
CLAMP
5.0V
VBIAS
REGULATOR
ICHG
VDRP
AMP
ROSC
BUFFER
AMP
0.225V
OFF
70mV
115mV
700ns
BLANKING
DIGITAL TO
ANALOG
CONVERTER
VCC UVLO
COMPARATOR
9.75V
9.0V
ENABLE
COMPARATOR
IOCSET
VID INPUT
COMPARATORS
(1 OF 5
SHOWN)
V
DELAY
COMPARATOR
DISCHARGE
COMPARATOR
O
C
+
-
FAULT
LATCH
R
S
S
D
IHICCUP
1.3V
Figure 7 – IR3082 Block Diagram
VID Control
A 5-bit VID voltage compatible with AMD’s Opteron/Athlon64, as shown in Table 1, is available at the VDAC pin.
The VID pins require an external bias voltage and should not be floated. The VID input comparators, with 1.2V
reference, monitor the VID pins and control the 6 bit Digital-to-Analog Converter (DAC) whose output is sent to the
VDAC buffer amplifier. The output of the buffer amp is the VDAC pin. The VDAC voltage is trimmed to compensate
for the input offsets of the Error Amp to provide 1% system set-point
accuracy and is pre-positioned 50mV higher
than Vout listed in Table1 for load positioning. The actual VDAC voltage does not determine the system accuracy
and has a wider tolerance.
The IR3082 can accept changes in the VID code while operating and vary the DAC voltage accordingly. The
sink/source capability of the VDAC buffer amp is programmed by the same external resistor that sets the oscillator
frequency. The slew rate of the voltage at the VDAC pin can be adjusted by an external capacitor between VDAC
pin and the VOSNS- pin. A resistor connected in series with this capacitor is required to compensate the VDAC
buffer amplifier. Digital VID transitions result in a smooth analog transition of the VDAC voltage and converter
output voltage minimizing inrush currents in the input and output capacitors and overshoot of the output voltage.
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