參數(shù)資料
型號(hào): IR3622AMPBF
廠商: International Rectifier
英文描述: HIGH FREQUENCY 2-PHASE, SINGLE OR DUAL OUTPUT SYNCHRONOUS STEP DOWN CONTROLLER WITH OUTPUT TRACKING AND SEQUENCING
中文描述: 高頻2相,單或雙輸出同步降壓控制器,輸出跟蹤和排序
文件頁數(shù): 6/33頁
文件大小: 690K
代理商: IR3622AMPBF
IR3622AMPbF
www.irf.com
6
Pin#
Pin Name
Description
1
Rt
Connecting a resistor from this pin to ground sets the switching frequency
(see figure 16 on page 17 for selecting resistor value)
Sense pin for OVP2 and Power Good2, Channel 2
2
V
SEN2
3
Fb2
Inverting input to the error amplifier2
4
5
Comp2
SS2/SD2/Mode
Compensation pin for the error amplifier2
Soft start for channel 2, can be used as SD pin. Float this pin for current
share single output application
Current limit set point for channel2
6
OCSet2
7, 17
VcH2, VcH1
Supply voltage for the high side output drivers. These are connected to
voltage that must be typically 6V higher than their bus voltages. A 0.1uF
high frequency capacitor must be connected from these pins to PGND to
provide peak drive current capability
Output drivers for the high side power MOSFETs
8,16
HDrv2, HDrv1
9
Enable
Enable pin, recycling this pin will reset OV, SS and Prebias latch
10, 14
PGnd2, PGnd1
These pins serve as the separate grounds for MOSFET drivers and should
be connected to the system’s ground plane
Output drivers for the synchronous power MOSFETs
11, 13
LDrv2 , LDrv1
12
VcL
Supply voltage for the low side output drivers
15
Seq
Enable pin for tracking and sequencing. If this pin is not used
connect it to V
out3
Current limit set point for Channel 1
18
OCSet1
19
SS1/SD1
Soft start for Channel 1, can be used as SD pin
20
Comp1
Compensation pin for the error amplifier1
21
Fb1
Inverting input to the error amplifier1
22
V
SEN1
Sense pin for OVP1 and Power Good1, Channel 1
23
Sync
External synchronization pin
24
PGood2
Power Good pin output for channel 2, open collector. This pin needs to be
externally pulled high
Non inverting input of error amplifier1
25
V
P1
26
V
P2
Non inverting input of error amplifier2
27
V
REF
Reference Voltage
28
Gnd
IC’s Ground
29
PGood1
Power Good pin output for Channel 1, open collector. This pin needs to be
externally pulled high
Supply voltage for the internal blocks of the IC. A 0.1uF high frequency
capacitor must be connected from this pin to Gnd.
Output of the internal regulator. A 0.1uF high frequency capacitor must be
connected from this pin to PGnd.
Sets the type of power up / down sequencing (ratiometric or
simultaneous). If this pin is not used connect it to V
out3
30
Vcc
31
V
out3
32
Track
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