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2
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Calculated continuous current based on maximum allowable junction
temperature. Package limitation current is 75A.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.14mH
R
G
= 25
, I
AS
= 58A, V
GS
=10V. Part not recommended for use
above this value.
I
SD
≤
58A, di/dt
≤
650A/μs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400μs; duty cycle
≤
2%.
S
D
G
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended
footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
R
θ
JC
(end of life) for D
2
Pak and TO-262 = 0.75°C/W. Note: This is the maximum
measured value after 1000 temperature cycles from -55 to 150°C and is
accounted for by the physical wearout of the die attach medium.
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
Drain-to-Source Breakdown Voltage
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
Static Drain-to-Source On-Resistance
V
GS(th)
Gate Threshold Voltage
I
DSS
Drain-to-Source Leakage Current
Parameter
Min. Typ. Max. Units
100
–––
–––
0.094
–––
8.0
2.0
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
1.5
–––
–––
10
4.0
20
250
200
-200
–––
V
V/°C
m
V
μA
I
GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Input Resistance
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
gfs
Forward Transconductance
Q
g
Total Gate Charge
Q
gs
Gate-to-Source Charge
Q
gd
Gate-to-Drain ("Miller") Charge
t
d(on)
Turn-On Delay Time
t
r
Rise Time
t
d(off)
Turn-Off Delay Time
t
f
Fall Time
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
C
oss
eff. (ER)
Effective Output Capacitance (Energy Related) –––
C
oss
eff. (TR)
Effective Output Capacitance (Time Related)
nA
R
G
f = 1MHz, open drain
Min. Typ. Max. Units
120
–––
–––
120
–––
31
–––
44
–––
24
–––
80
–––
55
–––
50
–––
5150
–––
360
–––
190
420
–––
500
–––
180
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
ns
pF
Diode Characteristics
Symbol
I
S
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Min. Typ. Max. Units
–––
–––
88
A
I
SM
–––
–––
380
A
V
SD
t
rr
–––
–––
–––
–––
–––
–––
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
–––
38
51
61
110
2.8
1.3
56
77
92
170
–––
V
ns
T
J
= 25°C
T
J
= 125°C
T
J
= 25°C
T
J
= 125°C
T
J
= 25°C
V
R
= 85V,
I
F
= 58A
di/dt = 100A/μs
Q
rr
Reverse Recovery Charge
nC
I
RRM
t
on
Reverse Recovery Current
Forward Turn-On Time
A
I
D
= 58A
R
G
= 4.1
V
GS
= 10V
V
GS
= 0V
V
DS
= 50V
= 1.0MHz
V
GS
= 0V, V
DS
= 0V to 80V , See Fig.11
V
GS
= 0V, V
DS
= 0V to 80V , See Fig. 5
V
GS
= 10V
V
DD
= 65V
T
J
= 25°C, I
S
= 58A, V
GS
= 0V
integral reverse
p-n junction diode.
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 58A
V
DS
= V
GS
, I
D
= 150μA
V
DS
= 100V, V
GS
= 0V
V
DS
= 100V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
V
GS
= -20V
MOSFET symbol
showing the
V
DS
= 80V
Conditions
Conditions
V
DS
= 50V, I
D
= 58A
I
D
= 58A