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參數(shù)資料
| 型號： | IRPLDIM1U |
| 廠商： | International Rectifier |
| 英文描述： | Dimming Ballast Control IC Design Kit |
| 中文描述： | 調(diào)光鎮(zhèn)流器控制IC設(shè)計工具包 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 209K |
| 代理商： | IRPLDIM1U |
5
www.irf.com
Power Factor Correction
The power factor correction section consists of the L6561D Power Factor Controller IC (IC1), MOSFET
M1, inductor L2, diode D2, capacitor C8 and additional biasing, sensing and compensation compo-
nents (see schematic diagram). This is a boost topology designed to step-up and regulate the output
DC bus voltage while drawing sinusoidal current from the line (low THD) which is “in phase” with the
AC input line voltage (HPF). The design of the power factor correction section was taken from the
L6561D data sheet and information on the operation and design considerations for the L6561D are
contained therein.
Ballast Control
The ballast control section is built around the IR21592 Ballast Control IC, IC2 of the Demo board.
The IR21592 contains an oscillator, a high voltage half-bridge gate driver, an analog dimming inter-
face and lamp fault protection circuitry. A block diagram of the IR21592 IC is shown in figure 1 and a
state diagram of the IR21592 is shown in figure 2.
Figure 1:
IR21592 Block Diagram
LEVEL
SHIFT
PULSE
FILTER &
LATCH
3
5.1V
4
6
10V
2
1.3uA
5
7
8
5.1V
1.0V
CPH
DIM
MAX
MIN
FMIN
IPH
VCO
Q
S
R1
R2 Q
Q
T
R
Q
16
14
15
VS
HO
VB
13
11
12
COM
LO
VCC
15.6V
10
1.6V
CS
UNDER-
VOLTAGE
DETECT
1
VDC
I
CT
I
CT
15uA
1uA
60uA
CT
I
FMIN
Q
S
R
Q
Q
S
R
Q
I
DIM
5.1V
1
0
VCC
400ns
DELAY
5.1V
3V
R
FB
V
ERR
REF
FB
CT
OVER-
TEMP
DETECT
IGN
DET
Q
S
R
Q
9
SD
2.0V
7.6V
Q
S
R
Q
I
DT
I
CT
+
I
DIM
/5
4/R
FMIN
1/R
FMIN
0.1/R
FMIN
0.1/R
FMIN
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