IRPT1060
page 11
Earth/ground fault
from positive bus to earth is detected by
the shunt in the postive bus and an opto-coupler. When fault
current exceeds a nominal value of 36A, this protection is
activated.
Overtemperature
is measured by a thermistor mounted close
to the inverter section. When the substrate temperature exceeds a
nominal value of 100
°
C, this protection is activated.
If any of the protection features is activated, the TRIP signal
goes high and is latched high, activating the internal latch in
IR2132J, which turns all gates to the inverter section off,
acknowledging to the controller through FAULT and turns on the
LED.
Trip Reset
The internal latch of the IR2132J can be reset by holding IN2,
IN4 and IN6 OFF simultaneously for a period greater than 12
μ
s.
The TRIP signal can be removed by pulling down the RESET
pin through the open collector device for 2
μ
s, this should be
done only after IN1,...,IN6 are turned OFF.
Interface with system controller
All signals are referred to negative DC bus (N). IN1,...IN6 are
TTL/CMOS compatible active low signals. Maximum voltage
rating for these signals is 5V. All channels are provided with
pull-up resistors and can be used with open collector inputs as
well.
FAULT is open collector, active low signal, provided with
47K pull-up resistor. Typical current sink capacity for this pin is
5 mA.
RESET should be applied with open collector device only and
only after IN1,...IN6 are turned OFF. Recommended RESET
pulse duration is 2
μ
s.
V
DD
is 5V and V
CC
is 15V output. If 5V output is used with a
large external capacitor, a diode should be connected between
V
DD
(anode) and V
CC
(cathode) to ensure that V
DD
does not
exceed V
CC
, due to potentially different discharge times for
storage capacitors when power is turned OFF.
V
FB
is scaled down dc bus voltage (0.023 X V
bus
nominal).
Functional Information
CAUTON
All control logic is referenced to negative power
bus which is live with respect to earth/ground.
Capacitor Soft Charge
A DC bus capacitor is connected to the rectifier bridge output
through an NTC. At power-up, the NTC limits the inrush current
to 100A. During normal operation current through the NTC
reduces its resistance, hence reducing its losses.
System Power Supply
A buck converter designed with IR2152 and operating from
the dc bus generates V
CC
(15V) and V
DD
(5V) for drive and
protection circuits. Both V
CC
and V
DD
are available at the
control connector to supply microprocessor controls. Total
current available from V
CC
and V
DD
(I
CC
and I
D
, respectively) is
60mA for external use.
Floating power supplies for high side devices are derived
through bootstrap technique, simplifying power supply
requirements.
Gate Drive Circuits
Gate drive for the inverter is implemented with an IR2132J
monolithic 3-phase HVIC driver. Short circuit buffer power
supply counters the voltage drop across a shunt in the negative dc
bus, allowing the device to have nominal gate voltage during
short circuit and maintaining short circuit current to a detectable
level.
The undervoltage circuit monitors the local gate driver power
supply voltage and sends a high input signal during
undervoltage, setting the latch and inhibiting the PWM input
signals.
System Protections
Short circuit
is monitored through a shunt in the negative
bus, which detects phase-to-phase short circuits and phase-to-
earth short circuits (when current flows from earth to negative
bus). Voltage drop across the shunt is compared to a pre-set limit
and when the current exceeds a nominal value of 30A this
protection is activated.