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| 型號： | IS42S32200B-6TL |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 2M X 32 SYNCHRONOUS DRAM, 5.5 ns, PDSO86 |
| 封裝： | 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-86 |
| 文件頁數(shù)： | 31/56頁 |
| 文件大?。?/td> | 537K |
| 代理商： | IS42S32200B-6TL |
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IS42S32200B
ISSI
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00C
09/29/03
31
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Parameters
Rating
Unit
V
DD
MAX
V
DDQ
V
IN
V
OUT
P
D
MAX
I
CS
T
OPR
Maximum Supply Voltage
Maximum Supply Voltage for Output Buffer
Input Voltage
Output Voltage
Allowable Power Dissipation
Output Shorted Current
Operating Temperature
–1.0 to +4.6
–1.0 to +4.6
–1.0 to +4.6
–1.0 to +4.6
1
50
0 to +70
–40 to +85
–55 to +150
V
V
V
V
W
mA
°C
MAX
Com.
Ind.
T
STG
Storage Temperature
°C
DC RECOMMENDED OPERATING CONDITIONS
(2,5)
(
At T
A
= 0 to +70°C)
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
DD
, V
DDQ
V
IH
V
IL
Supply Voltage
Input High Voltage
(3)
Input Low Voltage
(4)
3.0
2.0
-0.3
3.3
—
—
3.6
V
V
V
V
DD
+ 0.3
+0.8
CAPACITANCE CHARACTERISTICS
(1,2)
(At T
A
= 0 to +25°C, V
DD
= V
DDQ
= 3.3 ± 0.3V, f = 1 MHz)
Symbol
Parameter
Typ.
Max.
Unit
C
IN1
C
IN2
CI/O
Input Capacitance: A0-A10, BA0, BA1
Input Capacitance: (CLK, CKE,
CS
,
RAS
,
CAS
,
WE
, LDQM, UDQM)
Data Input/Output Capacitance: DQ0-DQ31
—
—
—
4
4
5
pF
pF
pF
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
2. All voltages are referenced to GND.
3. V
IH
(max) = V
DDQ
+ 2.0V with a pulse width
≤
3 ns. The pluse width cannot be greater than one third of the cycle rate.
4. V
IL
(min) = GND – 2.0V with a pulse < 3 ns. The pluse width cannot be greater than one third of the cycle rate.
5. An initial pause of 100us is required after power up, followed by two AUTO REFRESH commands, before proper device operation
is ensured. (Vdd and VddQ must be powered up simultaneously. GND and GNDQ must be at same potential.) The two AUTO
REFRESH command wake-ups should be repeated anytime the t
REF
refresh requirement is exceeded.
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PDF描述 |
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| IS42S32200B-6TLI | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200B-7T | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200B-7TI | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200B-7TL | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200B-7TLI | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42S32200B-6TLI | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II |
| IS42S32200B-6TL-TR | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II T/R |
| IS42S32200B-6T-TR | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II T/R |
| IS42S32200B-7T | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II 制造商:Integrated Silicon Solution Inc 功能描述:2M X 32 SYNCHRONOUS DRAM, 6.5 ns, PDSO86 |
| IS42S32200B-7TI | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II |
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