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| 型號(hào)： | IS42S32200B-7TI |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 2M X 32 SYNCHRONOUS DRAM, 6.5 ns, PDSO86 |
| 封裝： | 0.400 INCH, PLASTIC, TSOP2-86 |
| 文件頁(yè)數(shù)： | 12/56頁(yè) |
| 文件大?。?/td> | 537K |
| 代理商： | IS42S32200B-7TI |
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IS42S32200B
ISSI
12
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00C
09/29/03
REGISTER DEFINITION
Mode Register
The mode register is used to define the specific mode of
operation of the SDRAM. This definition includes the
selection of a burst length, a burst type, a CAS\ latency,
an operating mode and a write burst mode, as shown in
MODE REGISTER DEFINITION.
The mode register is programmed via the LOAD MODE
REGISTER command and will retain the stored information
until it is programmed again or the device loses power.
Mode register bits M0-M2 specify the burst length, M3
specifies the type of burst
(sequential or interleaved)
, M4- M6
specify the CAS latency, M7 and M8 specify the operating
mode, M9 specifies the WRITE burst mode, and M10 and
M11 and M12 are reserved for future use.
The mode register must be loaded when all banks are idle,
and the controller must wait the specified time before
initiating the subsequent operation. Violating either of
these requirements will result in unspecified operation.
MODE REGISTER DEFINITION
Latency Mode
M6 M5 M4 CAS Latency
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
Write Burst Mode
M9
0
1
Mode
Burst Write
Single-Bit Write
MRS
M8 M7
0
—
MRS
Mode Register Set
All Other States Reserved
0
—
Burst Type
M3 Type
0
1
Sequential
Interleaved
Burst Length
M2 M1 M0
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Sequential
1
2
4
8
Reserved
Reserved
Reserved
Full Page
Interleave
1
2
4
8
Reserved
Reserved
Reserved
Reserved
0
1
0
1
0
1
0
1
Address Bus
BA0,1
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
(1)
0
0
(1)
Note:
1. Maintain low during Mode Register Set.
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| IS42S32200B-7TL | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200B-7TLI | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200C1 | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42S32200B-7TI-TR | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II T/R |
| IS42S32200B-7TL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200B-7TLI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200B-7T-TR | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II T/R |
| IS42S32200C1 | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
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