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參數(shù)資料
| 型號(hào)： | IS42S32800B-6BLI |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 2M Words x 32 Bits x 4 Banks (256-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 8M X 32 SYNCHRONOUS DRAM, 5.5 ns, PBGA90 |
| 封裝： | 8 X 13 MM, 0.80 MM PITCH, LEAD FREE, MO-207, BGA-90 |
| 文件頁(yè)數(shù)： | 13/62頁(yè) |
| 文件大?。?/td> | 939K |
| 代理商： | IS42S32800B-6BLI |
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Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev.
B
0
5/24
/06
13
ISSI
IS42S32800B
DON T CARE
CLK
DQ
D
OUT
a
T2
T1
T4
T3
T6
T5
T0
COMMAND
READ - AP
BANK n
NOP
NOP
NOP
NOP
D
OUT
a + 1
D
OUT
d
D
OUT
d + 1
NOP
T7
BANK n
CAS Latency = 3 (BANK m)
BANK m
ADDRESS
Idle
NOP
NOTE: DQM is LOW.
BANK n,
COL a
BANK m,
COL d
READ - AP
BANK m
Internal
States
t
Page Active
READ with Burst of 4
Interrupt Burst, Precharge
Page Active
READ with Burst of 4
Precharge
RP - BANK
n
tRP - BANK m
CAS Latency = 3 (BANK n)
6
Concurrent Auto Precharge
An access command (READ or WRITE) to another bank while an access command with auto precharge enabled
is executing is not allowed by SDRAMs, unless the SDRAM supports CONCURRENT AUTO PRECHARGE.
ICSI SDRAMs support CONCURRENT AUTO PRECHARGE. Four cases where CONCURRENT AUTO
PRECHARGE occurs are defined below.
READ with Auto Precharge
· Interrupted by a READ (with or without auto precharge): A READ to bank m will interrupt a READ on bank n,
CAS latency later. The PRECHARGE to bank n will begin when the READ to bank m is regis-tered.
READ With Auto Precharge Interrupted by a READ
· Interrupted by a WRITE (with or without auto precharge): A WRITE to bank m will interrupt a READ on bank n
when registered. DQM should be used two clocks prior to the WRITE command to prevent bus contention. The
PRECHARGE to bank n will begin when the WRITE to bank m is registered.
READ With Auto Precharge Interrupted by a WRITE
CLK
DQ
D
OUT
a
T2
T1
T4
T3
T6
T5
T0
COMMAND
NOP
NOP
NOP
NOP
D
IN
d + 1
D
IN
d
D
IN
d + 2
D
IN
d + 3
NOP
T7
BANK n
BANK m
ADDRESS
Idle
NOP
DQM
NOTE: 1. DQM is HIGH at T2 to prevent D
OUT
-a+1 from contending with D
IN
-d at T4.
BANK n,
COL a
BANK m,
COL d
WRITE - AP
BANK m
Internal
States
t
Page
Active
READ with Burst of 4
Interrupt Burst, Precharge
Page Active
WRITE with Burst of 4
Write-Back
RP -
BANK
n
tWR -
BANK
m
CAS Latency = 3 (BANK n)
READ - AP
BANK n
1
DON’T CARE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS42S32800B-6T | 2M Words x 32 Bits x 4 Banks (256-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32800B-6TI | 2M Words x 32 Bits x 4 Banks (256-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32800B-6TL | 2M Words x 32 Bits x 4 Banks (256-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32800B-6TLI | 2M Words x 32 Bits x 4 Banks (256-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32800B-7B | 2M Words x 32 Bits x 4 Banks (256-MBIT) SYNCHRONOUS DYNAMIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42S32800B-6BLI-TR | 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 256M (8Mx32) 166MHz Industrial Temp RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
| IS42S32800B-6BL-TR | 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 256M 8Mx32 166Mhz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
| IS42S32800B-6B-TR | 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 256M 8Mx32 166Mhz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
| IS42S32800B-6T | 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 256M 8Mx32 166Mhz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
| IS42S32800B-6TI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:2M Words x 32 Bits x 4 Banks (256-MBIT) SYNCHRONOUS DYNAMIC RAM |
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