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參數(shù)資料
| 型號(hào)： | IS42S81600A-7TI |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| 中文描述： | 16M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封裝： | PLASTIC, TSOP2-54 |
| 文件頁數(shù)： | 45/65頁 |
| 文件大?。?/td> | 556K |
| 代理商： | IS42S81600A-7TI |
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50
XMEGA C3 [DATASHEET]
8361D–AVR–07/2013
30.
Programming and Debugging
30.1 Features
Programming
– External programming through PDI interface
Minimal protocol overhead for fast operation
Built-in error detection and handling for reliable operation
– Boot loader support for programming through any communication interface
Debugging
– Nonintrusive, real-time, on-chip debug system
– No software or hardware resources required from device except pin connection
– Program flow control
Go, Stop, Reset, Step Into, Step Over, Step Out, Run-to-Cursor
– Unlimited number of user program breakpoints
– Unlimited number of user data breakpoints, break on:
Data location read, write, or both read and write
Data location content equal or not equal to a value
Data location content is greater or smaller than a value
Data location content is within or outside a range
– No limitation on device clock frequency
Program and Debug Interface (PDI)
– Two-pin interface for external programming and debugging
– Uses the Reset pin and a dedicated pin
– No I/O pins required during programming or debugging
30.2 Overview
The Program and Debug Interface (PDI) is an Atmel proprietary interface for external programming and on-chip
debugging of a device.
The PDI supports fast programming of nonvolatile memory (NVM) spaces; flash, EEPOM, fuses, lock bits, and the user
signature row.
Debug is supported through an on-chip debug system that offers nonintrusive, real-time debug. It does not require any
software or hardware resources except for the device pin connection. Using the Atmel tool chain, it offers complete
program flow control and support for an unlimited number of program and complex data breakpoints. Application debug
can be done from a C or other high-level language source code level, as well as from an assembler and disassembler
level.
Programming and debugging can be done through the PDI physical layer. This is a two-pin interface that uses the Reset
pin for the clock input (PDI_CLK) and one other dedicated pin for data input and output (PDI_DATA). Any external
programmer or on-chip debugger/emulator can be directly connected to this interface.
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PDF描述 |
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| IS42S81600A-7TL | 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S81600A-7TLI | 16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IDT71V433 | 32K x 32 3.3V Synchronous SRAM Flow-Through Outputs |
| IDT71V65602 | 256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs |
| IDT71V65602S-100BG | 256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42S81600A-7TL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S81600A-7TLI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42S81600AL-7TL | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS42S81600B-6T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16Meg x 8, 8Meg x16 128-MBIT SYNCHRONOUS DRAM |
| IS42S81600B-6TL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16Meg x 8, 8Meg x16 128-MBIT SYNCHRONOUS DRAM |
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