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參數(shù)資料
| 型號(hào)： | IS61NLP12832-5B |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | PIPELINE NO WAIT STATE BUS SRAM |
| 中文描述： | 128K X 32 ZBT SRAM, 5 ns, PBGA119 |
| 封裝： | PLASTIC, BGA-119 |
| 文件頁(yè)數(shù)： | 8/20頁(yè) |
| 文件大?。?/td> | 154K |
| 代理商： | IS61NLP12832-5B |
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Integrated Silicon Solution, Inc.
—
1-800-379-4774
PRELIMINARY INFORMATION
Rev. 00C
11/30/00
IS61NP12832
IS61NLP12832
IS61NP12836
IS61NLP12836
IS61NP25618
IS61NLP25618
ISSI
INTERLEAVED BURST ADDRESS TABLE
(MODE = V
CC
)
External Address
A1 A0
1st Burst Address
A1 A0
2nd Burst Address
A1 A0
3rd Burst Address
A1 A0
00
01
10
11
01
00
11
10
10
11
00
01
11
10
01
00
LINEAR BURST ADDRESS TABLE
(MODE = GND)
ABSOLUTE MAXIMUM RATINGS
(1)
(MODE = GND)
Symbol
T
BIAS
T
STG
P
D
I
OUT
V
IN
, V
OUT
Voltage Relative to GND for I/O Pins
V
IN
Voltage Relative to GND for
for Address and Control Inputs
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause perma-
nent damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operational sections of this specifi-
cation is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect reliability.
2. This device contains circuity to protect the inputs against damage due to high static voltages or
electric fields; however, precautions may be taken to avoid application of any voltage higher
than maximum rated voltages to this high-impedance circuit.
3.
This device contains circuitry that will ensure the output devices are in High-Z at power up.
Parameter
Temperature Under Bias
Storage Temperature
Power Dissipation
Output Current (per I/O)
Value
–
10 to +85
–
65 to +150
1.6
100
–
0.5 to V
CCQ
+ 0.3
–
0.3 to 4.6
Unit
°
C
°
C
W
mA
V
V
0,0
1,0
0,1
A1', A0' = 1,1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS61NLP12832-5TQ | PIPELINE NO WAIT STATE BUS SRAM |
| IS61NLP12832-5TQI | PIPELINE NO WAIT STATE BUS SRAM |
| IS61NLP12836 | PIPELINE NO WAIT STATE BUS SRAM |
| IS61NLP12836-133B | PIPELINE NO WAIT STATE BUS SRAM |
| IS61NLP12836-133TQ | PIPELINE NO WAIT STATE BUS SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS61NLP12832A-200TQLI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4M (128Kx36) 200MHz Sync 靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61NLP12832A-200TQLI-TR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4M (128Kx36) 200MHz Sync 靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61NLP12836-133TQ | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Sync Quad 3.3V 4.5M-Bit 128K x 36 4.2ns 100-Pin TQFP |
| IS61NLP12836A-200TQI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4Mb 128Kx36 200Mhz 3.3v I/O RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61NLP12836A-200TQI-TR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4Mb 128Kx36 200Mhz 3.3v I/O RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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