參數(shù)資料
型號: IS62C6416AL
廠商: Integrated Silicon Solution, Inc.
英文描述: 64K x 16 HIGH-SPEED CMOS STATIC RAM
中文描述: 64K的× 16 HIGH-SPEED的CMOS靜態(tài)RAM
文件頁數(shù): 6/17頁
文件大?。?/td> 92K
代理商: IS62C6416AL
6
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
01/17/05
ISSI
IS61C6416AL
IS62C6416AL
IS64C6416AL
IS65C6416AL
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-12
-15
-35
-45
Symbol
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
HZOE
(2)
t
LZOE
(2)
t
HZCE
(2
t
LZCE
(2)
t
BA
t
HZB
t
LZB
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
OE
to High-Z Output
OE
to Low-Z Output
CE
to High-Z Output
CE
to Low-Z Output
LB
,
UB
Access Time
LB
,
UB
to High-Z Output
LB
,
UB
to Low-Z Output
Min. Max.
12
3
0
0
0
2
0
0
Min.
15
3
0
0
0
2
0
0
Max.
15
15
7
6
8
6
7
Min.
35
3
0
3
0
3
0
0
Max.
35
35
10
10
10
35
10
Min.
45
3
0
5
0
5
0
0
Max.
45
45
20
15
15
45
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
12
12
6
6
7
6
6
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
480
30 pF
Including
jig and
scope
255
OUTPUT
5V
480
5 pF
Including
jig and
scope
255
OUTPUT
5V
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0
to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
Figure 1
Figure 2
AC TEST LOADS
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