參數(shù)資料
型號: IS62LV5128LL-70B
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 512K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM
中文描述: 512K X 8 STANDARD SRAM, 70 ns, PBGA36
封裝: 8 X 10 MM, MINI, BGA-36
文件頁數(shù): 1/10頁
文件大?。?/td> 61K
代理商: IS62LV5128LL-70B
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
1
ISSI
reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. Copyright 2001, Integrated Silicon Solution, Inc.
IS62LV5128LL
512K x 8 LOW POWER and LOW Vcc
CMOS STATIC RAM
ISSI
DESCRIPTION
The
ISSI
IS62LV5128LL is a low voltage, 524,288 words by
8 bits, CMOS SRAM. It is fabricated using
ISSI
s low
voltage,
six transistor (6T),
CMOS technology.
The device
is
targeted
to
satisfy the demands of the state-of-the-art technologies
such as cell phones and pagers.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation
can be reduced
down with CMOS input levels. Additionally, easy memory
expansion is provided by using Chip Enable and Output
Enable inputs,
CE
and
OE
. The active LOW Write Enable (
WE
)
controls both writing and reading of the memory.
The IS62LV5128LL is available in a 36-pin mini BGA
package (8mm x 10mm).
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Access times of 70, 85 ns
CMOS low power operation:
— 135 mW (typical) operating
— 16.5 μW (typical) standby
Low data retention voltage: 2V (min.)
Output Enable (
OE
) and Chip Enable
(
CE
) inputs for ease in applications
TTL compatible inputs and outputs
Fully static operation:
— No clock or refresh required
Single 2.7V (min) to 3.15V (max) V
CC
power supply
Available n 36-pin mini BGA
MAY 2001
A0-A18
OE
WE
512K x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
CE
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