- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄377572 > IS63LV1024-12KL (INTEGRATED SILICON SOLUTION INC) 128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT PDF資料下載
參數(shù)資料
| 型號(hào)： | IS63LV1024-12KL |
| 廠(chǎng)商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT |
| 中文描述： | 128K X 8 STANDARD SRAM, 12 ns, PDSO32 |
| 封裝： | 0.400 INCH, LEAD FREE, PLASTIC, MS-027, SOJ-32 |
| 文件頁(yè)數(shù)： | 8/18頁(yè) |
| 文件大小： | 323K |
| 代理商： | IS63LV1024-12KL |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)當(dāng)前第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)
8
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. I
1/26/07
IS63LV1024
IS63LV1024L
AC WAVEFORMS
WRITE CYCLE NO. 2
(1)
(
WE
Controlled,
OE
= HIGH during Write Cycle)
WRITE CYCLE NO. 3
(
WE
Controlled:
OE
is LOW During Write Cycle)
Notes:
1. The internal write time is defined by the overlap of
CE
LOW and
WE
LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
2. I/O will assume the High-Z state if
OE
> V
IH
.
DATA UNDEFINED
LOW
t
WC
VALID ADDRESS
t
PWE1
t
AW
t
HA
HIGH-Z
t
HD
t
SA
t
HZWE
ADDRESS
CE
WE
D
OUT
D
IN
OE
DATA
IN
VALID
t
LZWE
t
SD
CE_WR2.eps
DATA UNDEFINED
t
WC
VALID ADDRESS
LOW
LOW
t
PWE2
t
AW
t
HA
HIGH-Z
t
HD
t
SA
t
HZWE
ADDRESS
CE
WE
D
OUT
D
IN
OE
DATA
IN
VALID
t
LZWE
t
SD
CE_WR3.eps
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS63LV1024-8KL | 128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT |
| IS63LV1024L-10HL | 128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT |
| IS63LV1024L-10JLI | 128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT |
| IS63LV1024L-10KLI | 128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT |
| IS63LV1024L-10TL | 128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS63LV1024-12KL-TR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 1Mb 128Kx8 12ns 3.3v Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪(fǎng)問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS63LV1024-12KTR | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Async Single 3.3V 1M-Bit 128K x 8 12ns 32-Pin SOJ T/R |
| IS63LV1024-12T | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Async Single 3.3V 1M-Bit 128K x 8 12ns 32-Pin TSOP-II 制造商:Integrated Silicon Solution Inc 功能描述:Static RAM, 128Kx8, 32 Pin, Plastic, TSOP |
| IS63LV1024-12TI | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS63LV1024-12T-TR | 制造商:Integrated Silicon Solution Inc 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。