參數(shù)資料
型號(hào): IS64WV12816BLL-15TA3
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 128K x 16 HIGH-SPEED CMOS STATIC RAM
中文描述: 128K X 16 STANDARD SRAM, 15 ns, PDSO44
封裝: PLASTIC, TSOP2-44
文件頁數(shù): 6/15頁
文件大?。?/td> 126K
代理商: IS64WV12816BLL-15TA3
6
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
02/03/06
ISSI
IS61WV12816BLL
IS64WV12816BLL
AC TEST LOADS
Figure 1.
31
9
Ω
5 pF
Including
jig and
scope
353
Ω
OUTPUT
3.3V
Figure 2.
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-12 ns
Min.
-15 ns
Min.
Symbol
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
HZOE
(2)
t
LZOE
(2)
t
HZCE
(2)
t
LZCE
(2)
t
BA
t
HZB
(2)
t
LZB
(2)
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to
3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
Parameter
Max.
Max.
Unit
Read Cycle Time
12
15
ns
Address Access Time
12
15
ns
Output Hold Time
3
3
ns
CE
Access Time
12
15
ns
OE
Access Time
5
7
ns
OE
to High-Z Output
5
6
ns
OE
to Low-Z Output
0
0
ns
CE
to High-Z Output
0
5
0
6
ns
CE
to Low-Z Output
3
3
ns
LB
,
UB
Access Time
5
7
ns
LB
,
UB
to High-Z Output
0
5
0
6
ns
LB
,
UB
to Low-Z Output
0
0
ns
Z
O
= 50
Ω
1.5V
50
Ω
OUTPUT
30 pF
Including
jig and
scope
AC TEST CONDITIONS
Parameter
Unit
Unit
(2.5V-3.6V)
0.4V to V
DD
-0.3V
1.5ns
V
DD
/2
(3.3V + 10%)
0.4V to V
DD
-0.3V
1.5ns
V
DD
/2 + 0.05
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level (V
Ref
)
Output Load
See Figures 1 and 2
See Figures 1 and 2
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