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參數(shù)資料
| 型號(hào)： | IS9108-11CS14 |
| 英文描述： | CPU Frequency Generator |
| 中文描述： | CPU頻率發(fā)生器 |
| 文件頁(yè)數(shù)： | 2/8頁(yè) |
| 文件大?。?/td> | 323K |
| 代理商： | IS9108-11CS14 |
Pin Configuration
Pin Descriptions for
AV9108-03, AV9108-05 and AV9108-10
PIN NUMBER
-05/-10/-13
1
5
PIN
NAME
TYPE
DESCRIPTION
-03
14
1
2
3
4
5
6
7
FS0
FS1
FS2
FS3
AGND
GMD
PD
X1/ICLK
Input
Input
Input
Input
-
-
Input
Input
Frequency Select 0 for CLK1 (-03 has pull-up).
Frequency Select 1 for CLK1 (-03 has pull-up).
Frequency Select 2 for CLK1 (-03 has pull-up).
Frequency Select 3 for CLK1 (-03 has pull-up).
Analog GROUND.
Digital GROUND.
POWER-DOWN. Shuts off chip when low. Internal pull-up.
CRYSTAL OUTPUT or INPUT CLOCK frequency. Typically 14.318 MHz
system clock.
CRYSTAL OUTPUT (No Connect when clock used.).
OUTPUT ENABLE. Tristates REFCLK when low. Pull-up.
OUTPUT ENABLE. Tristates CLK1 when low. Pull-up.
CLOCK1 Output (see decoding tables).
Digital power supply (+3V DC).
REFERENCE CLOCK output. Produces a buffered version of the input clock or
crystal frequency (typically 14.318 MHz).
2
3
4
8
9
10
11
12
13
X2
OE(REFCLK)
OE(CLK1)
CLK1
VDD
REFCLK
Output
Input
Input
Output
-
Output
6
7
8
FS0
1
8
REFCLK
GND
2
7
VDD
X1/ICLK
3
6
CLK1
X2
4
5
FS1
AV9108-05/-10
8-Pin DIP, SOIC
FS1
1
14
FS0
FS2
2
13
REFCLK
FS3
3
12
VDD
AGND
4
11
CLK1
GND
5
10
OE (CLK1)
PD
6
9
OE (REFCLK)
X1/ICLK
7
8
X2
AV9108-03/-11
14-Pin DIP, SOIC
AV9108
2
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