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參數(shù)資料
| 型號： | IS93C46D-3PLA3 |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 1-KBIT SERIAL ELECTRICALLY ERASABLE PROM |
| 中文描述： | 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDIP8 |
| 封裝： | 0.300 INCH, LEAD FREE, PLASTIC, DIP-8 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 283K |
| 代理商： | IS93C46D-3PLA3 |
PACKAGING INFORMATION
Dual Flat No-Lead
Package Code: D (8-pad)
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. B
02/13/06
Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
A2
b
(8X)
A1
A3
D
E
A
L (8X)
e (6X)
1.50 REF.
D2
E
Pad 1 ID
Pad 1 index area
tie bars
(3)
Notes:
1. Refer to JEDEC Drawing MO-229.
2. This is the metallized terminal and
is measured between 0.18 mm
and 0.30 mm from the terminal tip.
The terminal may have a straight
end instead of rounded.
3. Package may have exposed tie
bars, ending flush with package
edge.
DFN
MILLIMETERS
Sym.
Min. Nom. Max.
N0.
Pad
8
D
2.00 BSC
E
3.00 BSC
D2
1.50
—
1.75
E2
1.60
—
1.90
A
0.70
0.75
0.80
A1
0.0
0.02
0.05
A2
—
—
0.75
A3
0.20 REF
L
0.30
0.40
0.50
e
0.50 BSC
b
0.18
0.25
0.30
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| IS93C56 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| IS93C56-3 | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM |
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| IS93C56-3GR | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM |
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