參數(shù)資料
型號(hào)： ISL12025IVZ
廠商： Intersil
文件頁數(shù)： 18/27頁
文件大小： 0K
描述： IC RTC/CALENDAR EEPROM 8-TSSOP
標(biāo)準(zhǔn)包裝： 960
類型： 時(shí)鐘/日歷
特點(diǎn)： 警報(bào)器，閏年，監(jiān)控器，唯一 ID，監(jiān)視計(jì)時(shí)器
時(shí)間格式： HH:MM:SS（12/24 小時(shí)）
數(shù)據(jù)格式： YY-MM-DD-dd
接口： I²C，2 線串口
電源電壓： 2.7 V ~ 5.5 V
電壓 - 電源，電池： 1.8 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 8-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 8-TSSOP
包裝： 管件
25
FN6371.3
August 13, 2008
Alarm Operation Examples
Below are examples of both Single Event and periodic
Interrupt Mode alarms.
EXAMPLE 1
Alarm 0 set with single interrupt (IM = “0”)
A single alarm will occur on January 1 at 11:30am.
A. Set Alarm0 registers as follows:
B. Also, the AL0E bit must be set as follows:
After these registers are set, an alarm will be generated when
the RTC advances to exactly 11:30am on January 1 (after
seconds change from 59 to 00) by setting the AL0 bit in the
status register to “1”.
EXAMPLE 2
Pulsed interrupt once per minute (IM = “1”)
Interrupts at one minute intervals when the seconds register
is at 30s.
A. Set Alarm0 registers as follows:
B. Set the Interrupt register as follows:
Note that the status register AL0 bit will be set each time the
alarm is triggered, but does not need to be read or cleared.
ALARM0
REGISTER
BIT
DESCRIPTION
76
543210
HEX
SCA0
00
000000
00h
Seconds disabled
MNA0
10
110000
B0h Minutes set to 30,
enabled
HRA0
1
0
010001
91h
Hours set to 11,
enabled
DTA0
10
000001
81h
Date set to 1,
enabled
MOA0
10
000001
81h
Month set to 1,
enabled
DWA0
00
000000
00h
Day of week
disabled
CONTROL
REGISTER
BIT
DESCRIPTION
7654
3210
HEX
INT
0010
0000
x0hEnable Alarm
ALARM0
REGISTER
BIT
DESCRIPTION
76543210 HEX
SCA0
10110000 B0h Seconds set to 30,
enabled
MNA0
00000000 00h Minutes disabled
HRA0
0
0000000 00h Hours disabled
DTA0
00000000 00h Date disabled
MOA0
00000000 00h Month disabled
DWA0
00000000 00h Day of week disabled
CONTROL
REGISTER
BIT
DESCRIPTION
76543210 HEX
INT
10100000
x0hEnable Alarm and Int
Mode
ISL12025
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