參數資料
| 型號： | ISL12027AIB27Z-T |
| 廠商： | Intersil |
| 文件頁數： | 8/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC/CALENDAR EEPROM 8SOIC |
| 產品培訓模塊： | Solutions for Industrial Control Applications |
| 標準包裝： | 2,500 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，閏年，監(jiān)控器，監(jiān)視計時器 |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數據格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
16
FN8232.8
August 12, 2010
Standard Mode Power Switchover
Normal Operating Mode (VDD) to Battery Backup Mode
(VBAT)
To transition from the VDD to VBAT mode, both of the
following conditions must be met:
Condition 1:
VDD < VBAT - VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD < VTRIP
where VTRIP ≈ 2.2V
Battery Backup Mode (VBAT) to Normal Mode (VDD)
The ISL12027 device will switch from the VBAT to VDD mode
when one of the following conditions occurs:
Condition 1:
VDD > VBAT + VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD > VTRIP + VTRIPHYS
where VTRIPHYS ≈ 30mV
There are two discrete situations that are possible when
using Standard Mode: VBAT < VTRIP and VBAT > VTRIP.
These two power control situations are illustrated in
Figures 13 and 14.
OPTION 2 -LEGACY POWER CONTROL MODE
(ISL12027 DEFAULT)
The Legacy Mode follows conditions set in X1226 products.
In this mode, switching from VDD to VBAT is simply done by
comparing the voltages and the device operates from
whichever is the higher voltage. Care should be taken when
changing from Normal to Legacy Mode. If the VBAT voltage is
higher than VDD, then the device will enter battery back up
and unless the battery is disconnected or the voltage
decreases, the device will no longer operate from VDD. If that
is the situation on initial power-up, then I2C communication
may not be possible. For these applications, the ISL12027A
should be used.
To select the Option 2, BSW bit in the Power Register must
be set to “BSW = 1”.
Normal Mode (VDD) to Battery Backup Mode (VBAT)
To transition from the VDD to VBAT mode, the following
conditions must be met:
VDD < VBAT - VBATHYS
Battery Backup Mode (VBAT) to Normal Mode (VDD)
The device will switch from the VBAT to VDD mode when the
following condition occurs:
VDD > VBAT +VBATHYS
The Legacy Mode power control conditions are illustrated in
Figure 15.
Power On Reset
Application of power to the ISL12027 activates a Power On
Reset Circuit that pulls the RESET pin active. This signal
provides several benefits.
It prevents the system microprocessor from starting to
operate with insufficient voltage.
It prevents the processor from operating prior to
stabilization of the oscillator.
It allows time for an FPGA to download its configuration
prior to initialization of the circuit.
It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power-up.
When VDD exceeds the device VRESET threshold value for
typically 250ms the circuit releases RESET, allowing the
system to begin operation. Recommended slew rate is
between 0.2V/ms and 50V/ms.
NOTE: If the VBAT voltage drops below the data sheet
minimum of 1.8V and the VDD power cycles to 0V then back
to VDD voltage, then the RESET output may stay low and the
I2C communications will not operate. The VBAT and VDD
power will need to be cycled to 0V together to allow normal
operation again.
BATTERY BACKUP
MODE
VDD
2.2V
FIGURE 13. BATTERY SWITCHOVER WHEN VBAT < VTRIP
VBAT
VTRIP
1.8V
VBAT + VBATHYS
VBAT - VBATHYS
FIGURE 14. BATTERY SWITCHOVER WHEN VBAT > VTRIP
VTRIP
VBAT
VTRIP + VTRIPHYS
BATTERY BACKUP
MODE
VDD
VTRIP
3.0V
2.2V
VBAT
IN
VOLTAGE
VDD
ON
OFF
FIGURE 15. BATTERY SWITCHOVER IN LEGACY MODE
ISL12027, ISL12027A
相關PDF資料 |
PDF描述 |
|---|---|
| ISL12027IB27AZ-T | IC RTC/CALENDAR EEPROM 8-SOIC |
| VI-JVP-MZ | CONVERTER MOD DC/DC 13.8V 25W |
| ISL12027IBAZ-T | IC RTC/CALENDAR EEPROM 8-SOIC |
| VI-JVM-MZ | CONVERTER MOD DC/DC 10V 25W |
| ISL12027IB30AZ-T | IC RTC/CALENDAR EEPROM 8-SOIC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISL12027AIV27Z | 功能描述:實時時鐘 REAL TIME CLK/CLNDR W/EEPROM 2 63VSET RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12027AIV27Z-T | 功能描述:實時時鐘 REAL TIME CLK/CLNDR W/EEPROM 2 63VSET RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12027IB27AZ | 功能描述:實時時鐘 REAL TIME CLK/CLNDR W/EEPROM 2 92VSET RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12027IB27AZ-T | 功能描述:實時時鐘 REAL TIME CLK/CLNDR W/EEPROM 2 92VSET RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12027IB27Z | 功能描述:實時時鐘 REAL TIME CLK/CLNDR W/EEPROM 2 7VSET 8 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復。