TABLE 10. I2C, LV RESET, AND BATTERY BACKUP OPERATION SUM" />
參數(shù)資料
型號: ISL12027IVAZ-T
廠商: Intersil
文件頁數(shù): 18/28頁
文件大?。?/td> 0K
描述: IC RTC/CALENDAR EEPROM 8-TSSOP
產(chǎn)品培訓(xùn)模塊: Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝: 2,500
類型: 時鐘/日歷
特點: 警報器,閏年,監(jiān)控器,監(jiān)視計時器
時間格式: HH:MM:SS(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 2.7 V ~ 5.5 V
電壓 - 電源,電池: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 8-TSSOP
包裝: 帶卷 (TR)
25
FN8232.8
August 12, 2010
.
TABLE 10. I2C, LV RESET, AND BATTERY BACKUP OPERATION SUMMARY
(Shaded Row is same as X12028 operation)
MODE
SBIB
BIT
BSW
BIT
VBAT
SWITCHOVER
VOLTAGE
I2C ACTIVE IN
BATTERY
BACKUP?
EE PROM WRITE/
READ IN BATTERY
BACKUP?
FREQ/IRQ
ACTIVE?
NOTES
A
0
Standard Mode,
VTRIP =2.2V
typ
Default for
ISL12027A
NO
N/A
Operation of I2C bus down to VDD =VRESET,
then below that no communications. Battery
switchover at VTRIP.
B
(X12028
mode)
0
1
Legacy Mode,
VDD < VBAT
Default for
ISL12027
YES, only if
VBAT > VRESET
YES
Yes
Operation of I2C bus into battery backup
mode, but only for
VBAT > VDD > VRESET.
Bus must have pull-ups to VBAT. No
non-volatile writes with VBAT > VDD
C
1
0
Standard Mode,
VTRIP =2.2V
typ
NO
YES
Operation of I2C bus down to VDD = VRESET,
then below that no communications. Battery
switchover at VTRIP.
D
1
Legacy Mode,
VDD < VBAT
NO
YES
Operation of I2C busdown to VRESET or
VBAT, whichever is higher.
VRESET (2.63V)
RESET
VTRIP
VDD
tPURST
(2.2V)
IBAT
(BATTERY BACKUP MODE)
(VDD POWER, VBAT NOT CONNECTED)
FIGURE 29. EXAMPLE RESET OPERATION IN MODE A OR C
VBAT (3.0V)
I2C Bus Active
VRESET (2.63V)
RESET
VTRIP
VDD
tPURST
(2.2V)
IBAT
(BATTERY BACKUP MODE)
FIGURE 30. RESET OPERATION IN MODE D
VBAT (3.0V)
I2C BUS ACTIVE
ISL12027, ISL12027A
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