參數(shù)資料
型號(hào): ISL12029IV27AZ-T
廠商: Intersil
文件頁(yè)數(shù): 8/29頁(yè)
文件大?。?/td> 0K
描述: IC RTC/CALENDAR EEPROM 14-TSSOP
標(biāo)準(zhǔn)包裝: 2,500
類型: 時(shí)鐘/日歷
特點(diǎn): 警報(bào)器,閏年,監(jiān)控器,監(jiān)視計(jì)時(shí)器
時(shí)間格式: HH:MM:SS(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 2.7 V ~ 5.5 V
電壓 - 電源,電池: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
16
FN6206.10
December 16, 2010
overlapping to the following Alarm's Seconds register is
advised.
2. Other non-volatile writes: It is possible to do writes of
less than an entire page, but the final byte must always
be addresses 0000h through 0004h or 0008h though
000Ch to trigger a non-volatile write. Writing to those
blocks of 5 bytes sequentially, or individually, will trigger a
non-volatile write. If the DWA0 or DWA1 registers need to
be set, then enough bytes will need to be written to
overlap with the other Alarm register and trigger the
non-volatile write. For Example, if the DWA0 register is
being set, then the code can start with a multiple byte
write beginning at address 0006h, and then write 3 bytes
ending with the SCA1 register as follows:
Addr
Name
0006h DWA0
0007h Y2K0
0008h SCA1
If the Alarm1 is used, SCA1 would need to have the correct
data written.
Power Control Operation
The power control circuit accepts a VDD and a VBAT input.
Many types of batteries can be used with Intersil RTC
products. For example, 3.0V or 3.6V Lithium batteries are
appropriate, and battery sizes are available that can power
an Intersil RTC device for up to 10 years. Another option is
to use a SuperCap for applications where VDD is interrupted
for up to a month. See “Application Section” on page 23 for
more information.
There are two options for setting the change-over conditions
from VDD to Battery back-up mode. The BSW bit in the PWR
register controls this operation.
Option 1 - Standard Mode (Default for ISL12029A)
Option 2 - Legacy Mode (Default for ISL12029)
Note that applications that have VBAT > VDD will require the
ISL12029A (standard mode) for proper startup. Note that the
I2C bus may or may not be operational during battery
backup, that function is controlled by the SBIB bit. That
operation is covered after the power control section.
OPTION 1 - STANDARD POWER CONTROL MODE
(DEFAULT FOR ISL12029A)
In the Standard mode, the supply will switch over to the
battery when VDD drops below VTRIP or VBAT, whichever is
lower. In this mode, accidental operation from the battery is
prevented since the battery backup input will only be used
when the VDD supply is shut off.
To select Option 1, BSW bit in the Power Register must be
set to “BSW = 0”. A description of power switchover follows.
Standard Mode Power Switchover
Normal Operating Mode (VDD) to Battery Backup Mode
(VBAT)
To transition from the VDD to VBAT mode, both of the
following conditions must be met:
- Condition 1:
VDD < VBAT - VBATHYS
where VBATHYS ≈ 50mV
- Condition 2:
VDD < VTRIP
where VTRIP ≈ 2.2V
Battery Backup Mode (VBAT) to Normal Mode (VDD)
The ISL12029 device will switch from the VBAT to VDD mode
when one of the following conditions occurs:
- Condition 1:
VDD > VBAT + VBATHYS
where VBATHYS ≈ 50mV
- Condition 2:
VDD > VTRIP + VTRIPHYS
where VTRIPHYS ≈ 30mV
There are two discrete situations that are possible when using
Standard Mode: VBAT < VTRIP and VBAT > VTRIP. These two
power control situations are illustrated in Figures 13 and 14.
TABLE 7. VBAT TRIP POINT WITH DIFFERENT BSW SETTING
BSW BIT
VBAT TRIP POINT
(V)
POWER CONTROL SETTING
0
2.2
Standard Mode (ISL12029A)
1VDD < VBAT
Legacy Mode (ISL12029)
BATTERY
MODE
VDD
2.2V
FIGURE 13. BATTERY SWITCHOVER WHEN VBAT < VTRIP
VBAT
VTRIP
1.8V
VBAT + VBATHYS
VBAT - VBATHYS
BACKUP
FIGURE 14. BATTERY SWITCHOVER WHEN VBAT > VTRIP
VTRIP
VBAT
VTRIP + VTRIPHYS
BATTERY BACKUP
MODE
VDD
VTRIP
3.0V
2.2V
ISL12029, ISL12029A
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