- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9381 > ISL12057IBZ (Intersil)IC RTC/CALENDAR I2C 8-SOIC PDF資料下載
參數(shù)資料
| 型號： | ISL12057IBZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 2/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC/CALENDAR I2C 8-SOIC |
| 標準包裝： | 980 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，閏年 |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 1.8 V ~ 3.6 V |
| 電壓 - 電源，電池： | 1.4 V ~ 1.8 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 管件 |
10
FN6755.1
March 3, 2011
Interrupt Control Register (INT) [Address 0Eh]
OSCILLATOR ENABLE BIT (EOSC)
The EOSC bit enables the crystal oscillator function when it
is set to “0”. When the EOSC bit is set to “1”, the crystal
oscillator function is disabled, and the device enters power-
saving mode. The EOSC bit is set to “0” at power-up.
FREQUENCY OUT CONTROL BITS (RS2, RS1)
These bits select the output frequency at the IRQ1/FOUT
pin. INTCN must be set to “0” for frequency output at the
FOUT pin.
INTERRUPT CONTROL BIT (INTCN) AND ALARM
INTERRUPT ENABLE BITS (A2IE, A1IE)
The INTCN bit controls the relationship between the alarm
interrupts and the IRQ1/FOUT and IRQ2 pins. The A2IE and
A1IE bits enable the alarm interrupts, A2F and A1F, to assert
Interrupt Selection with INTCN, A2IE and A1IE bits.
Status Register (SR) [Address 0Fh]
The Status Register is located in the memory map at
address 0Fh. This is a volatile register that provides status of
oscillator failure and alarm interrupts.
ALARM1 INTERRUPT BIT (A1F)
These bits announce if the Alarm1 matches the real-time
clock. If there is a match, the respective bit is set to “1”. This
bit is manually reset to “0” by the user. A write to this bit in
the SR can only set it to “0”, not to “1”.
ALARM2 INTERRUPT BIT (A2F)
These bits announce if the Alarm2 matches the real-time
clock. If there is a match, the respective bit is set to “1”. This
bit is manually reset to “0” by the user. A write to this bit in
the SR can only set it to “0”, not to “1”.
OSCILLATOR FAILURE BIT (OSF)
This bit is set to a “1” when there is no oscillation on the X1
pin. The bit is set by hardware (ISL12057 internally) and can
only be disabled by having an oscillation on X1 and manually
resetting to “0” to reset it.
Alarm1 Registers
Addresses [Address 07h to 0Ah]
The Alarm1 register bytes are set up identically to the RTC
register bytes, except that the MSB of each byte functions as
an enable bit (enable = “0”). These enable bits specify which
alarm registers (seconds, minutes, etc.) are used to make
the comparison. When all the enable bits are set to “1”,
Alarm1 triggers once per second. Note that there is no alarm
byte for month and year.
The Alarm1 function works as a comparison between the
Alarm1 registers and the RTC registers. As the RTC
advances, Alarm1 is triggered when a match occurs
between the Alarm1 registers and the RTC registers. Any
one Alarm1 register, multiple registers, or all registers can be
enabled for a match.
To clear Alarm1, the A1F status bit must be set to “0” with a
write.
TABLE 2. INTERRUPT CONTROL REGISTER (INT)
ADDR
7
6
5
43210
0Eh
EOSC
0
RS2
RS1
INTCN
A2IE
A1IE
Default
0
11000
TABLE 3. FREQUENCY SELECTION OF
FOUT PIN
FREQUENCY
FOUT (Hz)
RS2
RS1
COMMENT
32768
1
Free-running crystal clock
8192
1
0
Free-running crystal clock
4096
0
1
Free-running crystal clock
1
0
Sync at RTC write
TABLE 4. ALARM INTERRUPT SELECTION WITH INTCN,
A2IE AND A1IE BITS
INTCN
A2IE
A1IE
IRQ1/FOUT
IRQ2
00
0
FOUT
HIGH
00
1
FOUT
A1F
01
0
FOUT
A2F
01
1
FOUT
A1F or A2F
1
0
HIGH
10
1
HIGH
A1F
11
0
A2F
HIGH
11
1
A2F
A1F
TABLE 5. STATUS REGISTER (SR)
ADDR
7
6
5
4
3
2
1
0
0Fh
OSF
0
A2F
A1F
Default
1
0
TABLE 6. ALARM1 INTERRUPT WITH ENABLE BITS
SELECTION
A1DW/DT A1M1 A1M2 A1M3 A1M4
ALARM1 INTERRUPT
X
1111
Every Second
X
0111
Match Second
X
1011
Match Minute
ISL12057
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISL12082IB8Z-T | IC RTC I2C LO-POWER 8-SOIC |
| ISL1208IU8Z-TK | IC RTC/CALENDAR I2C 8-MSOP |
| VI-J44-MZ | CONVERTER MOD DC/DC 48V 25W |
| AD5258BRMZ100 | IC POT DGTL I2C 100K 64P 10MSOP |
| VI-J1Y-MZ | CONVERTER MOD DC/DC 3.3V 16.5W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL12057IBZ-T | 功能描述:實時時鐘 REAL TIME CLK W/ ALARM DS1337 COMP RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12057IRUZ-T | 功能描述:實時時鐘 REAL TIME CLK W/ ALARM DS1337 COMP RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12057IUZ | 功能描述:實時時鐘 REAL TIME CLK W/ ALARM DS1337 COMP RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12057IUZ-T | 功能描述:實時時鐘 REAL TIME CLK W/ ALARM DS1337 COMP RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12058 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Cost and Low Power I2C-Bus? Real Time Clock/Calendar |
發(fā)布緊急采購，3分鐘左右您將得到回復。