參數(shù)資料
型號(hào): ISL1218IBZ
廠商: Intersil
文件頁數(shù): 10/21頁
文件大?。?/td> 0K
描述: IC RTC LP BATT BACKED SRAM 8SOIC
產(chǎn)品培訓(xùn)模塊: Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝: 980
類型: 時(shí)鐘/日歷
特點(diǎn): 警報(bào)器,閏年,SRAM
存儲(chǔ)容量: 8B
時(shí)間格式: HH:MM:SS(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 2.7 V ~ 5.5 V
電壓 - 電源,電池: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
18
FN6313.0
June 22, 2006
A system to implement temperature compensation would
consist of the ISL1218, a temperature sensor, and a
microcontroller. These devices may already be in the system
so the function will just be a matter of implementing software
and performing some calculations. Fairly accurate
temperature compensation can be implemented just by
using the crystal manufacturer’s specifications for the
turnover temperature T0 and the drift coefficient (β). The
formula for calculating the oscillator adjustment necessary
is:
Adjustment (ppm) = (T – T0)
2 * β
Once the temperature curve for a crystal is established, then
the designer should decide at what discrete temperatures
the compensation will change. Since drift is higher at
extreme temperatures, the compensation may not be
needed until the temperature is greater than 20°C from T0.
A sample curve of the ATR setting vs. Frequency Adjustment
for the ISL1218 and a typical RTC crystal is given in
Figure 18. This curve may vary with different crystals, so it is
good practice to evaluate a given crystal in an ISL1218
circuit before establishing the adjustment values.
This curve is then used to figure what ATR and DTR settings
are used for compensation. The results would be placed in a
lookup table for the microcontroller to access.
Layout Considerations
The crystal input at X1 has a very high impedance, and
oscillator circuits operating at low frequencies such as
32.768kHz are known to pick up noise very easily if layout
precautions are not followed. Most instances of erratic
clocking or large accuracy errors can be traced to the
susceptibility of the oscillator circuit to interference from
adjacent high speed clock or data lines. Careful layout of the
RTC circuit will avoid noise pickup and insure accurate
clocking.
Figure 19 shows a suggested layout for the ISL1218 device
using a surface mount crystal. Two main precautions should
be followed:
Do not run the serial bus lines or any high speed logic lines
in the vicinity of the crystal. These logic level lines can
induce noise in the oscillator circuit to cause misclocking.
Add a ground trace around the crystal with one end
terminated at the chip ground. This will provide termination
for emitted noise in the vicinity of the RTC device.
In addition, it is a good idea to avoid a ground plane under
the X1 and X2 pins and the crystal, as this will affect the load
capacitance and therefore the oscillator accuracy of the
circuit. If the ~IRQ/FOUT pin is used as a clock, it should be
routed away from the RTC device as well. The traces for the
VBAT and VCC pins can be treated as a ground, and should
be routed around the crystal.
Super Capacitor Backup
The ISL1218 device provides a VBAT pin which is used for a
battery backup input. A Super Capacitor can be used as an
alternative to a battery in cases where shorter backup times
are required. Since the battery backup supply current
required by the ISL1218 is extremely low, it is possible to get
months of backup operation using a Super Capacitor.
Typical capacitor values are a few F to 1 Farad or more
depending on the application.
If backup is only needed for a few minutes, then a small
inexpensive electrolytic capacitor can be used. For extended
periods, a low leakage, high capacity Super Capacitor is the
best choice. These devices are available from such vendors
as Panasonic and Murata. The main specifications include
working voltage and leakage current. If the application is for
charging the capacitor from a +5V ±5% supply with a signal
diode, then the voltage on the capacitor can vary from ~4.5V
to slightly over 5.0V. A capacitor with a rated WV of 5.0V
may have a reduced lifetime if the supply voltage is slightly
high. The leakage current should be as small as possible.
For example, a Super Capacitor should be specified with
leakage of well below 1A. A standard electrolytic capacitor
with DC leakage current in the microamps will have a
severely shortened backup time.
Below are some examples with equations to assist with
calculating backup times and required capacitance for the
ISL1218 device. The backup supply current plays a major
part in these equations, and a typical value was chosen for
-40.0
-30.0
-20.0
-10.0
0.0
10.0
20.0
30.0
40.0
50.0
60.0
70.0
80.0
90.0
0
5 10 15 20 25 30 35 40 45 50 55 60
ATR SETTING
PP
M
A
D
JU
STM
E
N
T
FIGURE 18. ATR SETTING vs OSCILLATOR FREQUENCY
ADJUSTMENT
FIGURE 19. SUGGESTED LAYOUT FOR ISL1218 AND
CRYSTAL
ISL1218
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