參數(shù)資料
型號: ISL22102IV20Z-EVAL
廠商: Intersil
文件頁數(shù): 5/11頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR ISL22102IV20Z
標準包裝: 1
系列: *
3
FN6788.1
January 14, 2010
Pinouts
ISL22102
(20 LD QFN)
TOP VIEW
ISL22102
(20 LD TSSOP)
TOP VIEW
UP
FLAG
D2
SB
D1
LEFT_OUT
VB
RIGHT_OUT
CB
RIGHT_IN
DN
VCC
AVCC
MUTE
LEFT_IN
D0
GND
HPB
VTH
HPA
1
2
3
4
5
67
8
9
10
15
14
13
12
11
20
19
18
17
16
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
FLAG
SB
UP
DN
MUTE
VCC
LEFT_IN
AVCC
LEFT_OUT
CB
D2
D0
VTH
GND
D1
HPB
HPA
RIGHT_IN
RIGHT_OUT
VB
Pin Description
PIN
(QFN)
PIN
(TSSOP)
SYMBOL
FUNCTION
1
4
DN
Active low volume decrement input with internal pull-up.
2
5
MUTE
Active low mute input with internal pull-up.
3
6
VCC
Digital Power Supply.
4
7
AVCC
Analog Power Supply.
5
8
LEFT_IN
Input terminal of the Left Channel Potentiometer. Referenced to VB.
6
9
LEFT_OUT
Left channel output. Referenced to VB.
7
10
CB
Terminal for external bypass capacitor to GND.
8
11
VB
AVCC/2 reference output. Can be used as a signal reference for other system components.
9
12
RIGHT_OUT
Right channel output. Referenced to VB.
10
13
RIGHT_IN
Input terminal of the Right Channel Potentiometer. Referenced to VB.
11
14
HPA
Terminal A of audio-detector high pass filter capacitor.
12
15
HPB
Terminal B of audio-detector high pass filter capacitor.
13
16
GND
System Ground. Overall for analog and digital power supply.
14
17
VTH
Analog Input threshold for audio detection. Require an external resistor to VB.
15
18
D0
Programming bit (LSB) input for delayed FLAG low output.
16
19
D1
Programming bit input for delayed FLAG low output.
17
20
D2
Programming bit (MSB) input for delayed FLAG low output.
18
1
FLAG
Output signal indicates audio input detection.
19
2
SB
Active low Standby Mode input with internal pull-up.
20
3
UP
Active low volume increment input with internal pull-up.
EPAD*
Exposed Die Pad internally connected to GND
*Note: PCB thermal land for QFN/TDFN EPAD should be connected to GND plane or left floating. For more information refer to
ISL22102
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