FN6912.1 April 15, 2010 Write Operation A Write operation requires a START condition, followed by a valid Identification Byte, a valid A" />
參數(shù)資料
型號: ISL22317WFRTZ
廠商: Intersil
文件頁數(shù): 5/15頁
文件大小: 0K
描述: IC POT DGTL 128TP LN LP 10-TDFN
產(chǎn)品培訓(xùn)模塊: Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝: 100
系列: XDCP™
接片: 128
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±10 ppm/°C
存儲(chǔ)器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 10-TDFN-EP(3x3)
包裝: 管件
13
FN6912.1
April 15, 2010
Write Operation
A Write operation requires a START condition, followed by a
valid Identification Byte, a valid Address Byte, a Data Byte,
and a STOP condition. After each of the three bytes, the
ISL22317 responds with an ACK. At this time, the device
enters its standby state (see Figure 23). The non-volatile
write cycle starts after a STOP condition is determined and
requires up to 20ms delay for the next non-volatile write.
Read Operation
A Read operation consists of a three byte instruction
followed by one or more Data Bytes (see Figure 24). The
master initiates the operation issuing the following
sequence: a START, the Identification byte with the R/W bit
set to “0”, an Address Byte, a second START, and a second
Identification byte with the R/W bit set to “1”. After each of
the three bytes, the ISL22317 responds with an ACK. Then
the ISL22317 transmits Data Bytes as long as the master
responds with an ACK during the SCL cycle following the
eighth bit of each byte. The master terminates the read
operation (issuing a ACK and STOP condition) following the
last bit of the last Data Byte (see Figure 24).
In order to read back the non-volatile IVR, it is recommended
that the application reads the ACR first to verify the WIP bit
is 0. If the WIP bit (ACR[5]) is not 0, the host should repeat
its reading sequence again.
SDA OUTPUT FROM
TRANSMITTER
SDA OUTPUT FROM
RECEIVER
8
1
9
START
ACK
SCL FROM
MASTER
HIGH IMPEDANCE
FIGURE 22. ACKNOWLEDGE RESPONSE FROM RECEIVER
S
T
A
R
T
S
T
O
P
IDENTIFICATION
BYTE
ADDRESS
BYTE
DATA
BYTE
A
C
K
SIGNALS FROM
THE MASTER
SIGNALS FROM
THE SLAVE
A
C
K
00
0
11
A
C
K
WRITE
SIGNAL AT SDA
00 0 0
0
A1
0
FIGURE 23. BYTE WRITE SEQUENCE
0
SIGNALS
FROM THE
MASTER
SIGNALS FROM
THE SLAVE
SIGNAL AT SDA
S
T
A
R
T
IDENTIFICATION
BYTE WITH
R/W=0
ADDRESS
BYTE
A
C
K
A
C
K
00
0
11
S
T
O
P
A
C
K
1
IDENTIFICATION
BYTE WITH
R/W=1
A
C
K
S
T
A
R
T
LAST READ
DATA BYTE
FIRST READ
DATA BYTE
A
C
K
0
00 0
FIGURE 24. READ SEQUENCE
A
C
K
0
01 01
0
A1
ISL22317
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