參數(shù)資料
型號： ISL22426UFV14Z
廠商： Intersil
文件頁數(shù)： 9/15頁
文件大?。?/td> 0K
描述： IC POT DGTL 128TP LN LP 14-TSSOP
標(biāo)準(zhǔn)包裝： 960
系列： XDCP™
接片： 128
電阻（歐姆）： 50k
電路數(shù)： 2
溫度系數(shù)： 標(biāo)準(zhǔn)值 ±80 ppm/°C
存儲器類型： 非易失
接口： 4 線 SPI（芯片選擇）
電源電壓： 2.7 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 14-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 14-TSSOP
包裝： 管件
3
FN6180.2
September 8, 2009
Absolute Maximum Ratings
Thermal Information
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at any Digital Interface Pin
with Respect to GND . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Voltage at any DCP Pin with Respect to GND. . . . . . . -0.3V to VCC
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup (Note 4) . . . . . . . . . . . . . . . . . . Class II, Level B @ +125°C
ESD Ratings
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .350V
Thermal Resistance (Typical)
θJA (°C/W) θJC(°C/W)
14 Lead TSSOP (Note 1) . . . . . . . . . . .
100
N/A
16 Lead QFN (Notes 2, 3) . . . . . . . . . .
40
3.0
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
Recommended Operating Conditions
Temperature Range (Extended Industrial). . . . . . . . -40°C to +125°C
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mW
Wiper Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
θ
JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2.
θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For
θ
JC, the “case temp” location is the center of the exposed metal pad on the package underside.
4. Jedec Class II pulse conditions and failure criterion used. Level B exceptions are: using a max positive pulse of 6.5V on the SHDN pin, and using
a max negative pulse of -0.8V for all pins.
Analog Specifications
Over recommended operating conditions, unless otherwise stated.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 22)
TYP
(Note 5)
MAX
(Note 22)
UNIT
RTOTAL
RH to RL Resistance
W option
10
k
Ω
U option
50
k
Ω
RH to RL Resistance Tolerance
W and U option
-20
+20
%
End-to-End Temperature Coefficient
W option
±50
ppm/°C
(Note 21)
U option
±80
ppm/°C
(Note 21)
VRH, VRL
VRH and VRL Terminal Voltages
VRH and VRL to GND
0
VCC
V
RW
Wiper Resistance
VCC = 3.3V, wiper current = VCC/RTOTAL
70
200
Ω
CH/CL/CW
(Note 21)
Potentiometer Capacitance
10/10/25
pF
ILkgDCP
Leakage on DCP Pins
Voltage at pin from GND to VCC
0.1
1
A
VOLTAGE DIVIDER MODE (0V @ RLi; VCC @ RHi; measured at RWi, unloaded; i = 0 or 1)
INL
(Note 10)
Integral Non-linearity
Monotonic over all tap positions, W and U
options
-1
1
LSB
(Note 6)
DNL
(Note 9)
Differential Non-linearity
Monotonic over all tap positions, W and U
options
-0.5
0.5
LSB
(Note 6)
ZSerror
(Note 7)
Zero-scale Error
W option
0
1
5
LSB
(Note 6)
U option
0
0.5
2
LSB
(Note 6)
FSerror
(Note 8)
Full-scale Error
W option
-5
-1
0
LSB
(Note 6)
U option
-2
-1
0
LSB
(Note 6)
ISL22426
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