15 FN7887.0 July 26, 2011 after successful receipt of an Address Byte. The ISL23318 also responds with an ACK after receiving a Data B" />
參數(shù)資料
型號: ISL23318UFUZ
廠商: Intersil
文件頁數(shù): 7/19頁
文件大小: 0K
描述: IC DGTL POT 1CH 50K 10MSOP
標(biāo)準(zhǔn)包裝: 1,000
系列: XDCP™
接片: 128
電阻(歐姆): 50k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 85 ppm/°C
存儲器類型: 易失
接口: I²C(設(shè)備位址)
電源電壓: 1.2 V ~ 5.5 V,1.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 管件
ISL23318
15
FN7887.0
July 26, 2011
after successful receipt of an Address Byte. The ISL23318 also
responds with an ACK after receiving a Data Byte of a write
operation. The master must respond with an ACK after receiving
a Data Byte of a read operation.
A valid Identification Byte contains 10100 as the five MSBs, and
the following two bits matching the logic values present at pins
A1 and A0. The LSB is the Read/Write bit. Its value is “1” for a
Read operation and “0” for a Write operation (see Table 3).
TABLE 3. IDENTIFICATION BYTE FORMAT
10100
A1
A0
R/W
(MSB)
(LSB)
LOGIC VALUES AT PINS A1 AND A0, RESPECTIVELY
SDA
SCL
START
DATA
STOP
STABLE
CHANGE
DATA
STABLE
FIGURE 27. VALID DATA CHANGES, START AND STOP CONDITIONS
SDA OUTPUT FROM
TRANSMITTER
SDA OUTPUT FROM
RECEIVER
8
1
9
START
ACK
SCL FROM
MASTER
HIGH IMPEDANCE
FIGURE 28. ACKNOWLEDGE RESPONSE FROM RECEIVER
S
T
A
R
T
S
T
O
P
IDENTIFICATION
BYTE
ADDRESS
BYTE
DATA
BYTE
A
C
K
SIGNALS FROM
THE MASTER
SIGNALS FROM
THE SLAVE
A
C
K
10
1
00
A
C
K
WRITE
SIGNAL AT SDA
00 0
A0
A1
FIGURE 29. BYTE WRITE SEQUENCE
0
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