17 FN6954.1 September 9, 2011 Standby Mode Operation The ADC can be put into standby mode to save power. Standby mode reduce" />
參數(shù)資料
型號: ISL26132AVZ-T
廠商: Intersil
文件頁數(shù): 9/23頁
文件大?。?/td> 0K
描述: IC ADC 24BIT SRL 80SPS 24TSSOP
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 24
采樣率(每秒): 80
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 80mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個差分,雙極
ISL26132, ISL26134
17
FN6954.1
September 9, 2011
Standby Mode Operation
The ADC can be put into standby mode to save power. Standby
mode reduces the power to all circuits in the device except the
crystal oscillator amplifier. To enter the standby mode, take the
SCLK signal high and hold it high after SDO/RDY falls. The
converter will remain in standby mode as long as SCLK is held
high. To return to normal operation, take SCLK back low and wait
for the SDO/RDY to fall to indicate that a new conversion has
completed. Figure 33 and Table 12 illustrate the details of
standby mode.
Supply currents are equal in Standby and Power-down modes
unless a Crystal is used. If the Crystal is used, the Crystal
amplifier is turned ON, even in the standby mode.
Performing Offset Calibration After Standby
Mode
To perform an offset calibration automatically upon returning
from standby, deliver 2 or more additional SCLKs following a
data read cycle, and then set and hold SCLK high. The device will
remain in Standby as long as SCLK remains high. A calibration
cycle will begin once SCLK is brought low again to resume
normal operation. Additional time will be required to perform the
calibration after returning from Standby. Figure 34 and Table 13
illustrate the details of performing offset calibration after
standby mode.
TABLE 12. STANDBY MODE TIMING
PARAMETER
DESCRIPTION
MIN
MAX
UNITS
t9
SCLK High after
SDO/RDY Low
SPEED = 1
0
12.44
ms
SPEED = 0
0
99.94
t10
Standby Mode Delay
SPEED = 1
12.5
SPEED = 0
100
t11
SDO/RDY falling edge
after SCLK Low
SPEED = 1
50
60
SPEED = 0
400
410
TABLE 13. OFFSET CALIBRATION TIMING AFTER STANDY
PARAMETER
DESCRIPTION
MIN
MAX
UNITS
t12
SDO/RDY Low after
SCLK Low
SPEED = 1
108
113
ms
SPEED = 0
808
813
ms
FIGURE 34. OFFSET CALIBRATION WAVEFORMS AFTER STANDBY
SDO/RDY
SCLK
23
22
21
0
124
25
STANDBY MODE
DATA READY AFTER CALIBRATION
23
BEGIN
CALIBRATION
t12
t10
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