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參數(shù)資料
| 型號： | ISL26134AV28EV1Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 5/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR ISL26134AV28 |
| 標準包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 80 |
| 數(shù)據(jù)接口： | USB |
| 輸入范圍： | ±9.766mV |
| 工作溫度： | -40°C ~ 105°C |
| 已用 IC / 零件： | ISL26134 |
| 已供物品： | 板 |
ISL26132, ISL26134
13
FN6954.1
September 9, 2011
Filtering PGA Output Noise
The programmable gain amplifier, as shown in Figure 24,
includes a passive RC filter on its output. The resistors are
located inside the chip on the outputs of the differential amplifier
stages. The capacitor (nominally a 100nF C0G ceramic or a PPS
film (Polyphenylene sulfide)) for the filter is connected to the two
CAP pins of the chip. The outputs of the differential amplifier
stages of the PGA are filtered before their signals are presented
to the delta-sigma modulator. This filter reduces the amount of
noise by limiting the signal bandwidth and filters the chopping
artifacts of the chopped PGA stage.
Voltage Reference Inputs (VREF+, VREF-)
The voltage reference for the ADC is derived from the difference
in the voltages presented to the VREF+ and VREF- pins;
VREF = (VREF+ - VREF-). The ADCs are specified with a voltage
reference value of 5V, but a voltage reference as low as 1.5V can
be used. For proper operation, the voltage on the VREF+ pin
should not be greater than AVDD + 0.1V and the voltage on the
VREF- pin should not be more negative than AGND - 0.1V.
Clock Sources
The ISL26132, ISL26134 can operate from an internal oscillator,
an external clock source, or from a crystal connected between
the XTALIN/CLOCK and XTALOUT pins. See the block diagram of
the clock system in Figure 25. When the ADC is powered up, the
CLOCK DETECT block determines if an external clock source is
present. If a clock greater than 300kHz is present on the
XTALIN/CLOCK pin, the circuitry will disable the internal oscillator
on the chip and use the external clock as the clock to drive the
chip circuitry. If the ADC is to be operated from the internal
oscillator, the XTALIN/CLOCK pin should be grounded.
If the ADC is to be operated from a crystal, it should be located
close to the package pins of the ADC. Note that external loading
capacitors for the crystal are not required as there are loading
capacitors built into the silicon, although the capacitor values are
optimized for operation with a 4.9152MHz crystal.
The XTALOUT pin is not intended to drive external circuits.
Digital Filter Characteristics
The digital filter inside the ADC is a fourth-order Siinc filter.
it is operated from a 4.9152MHz crystal. The internal oscillator is
factory trimmed so the frequency response for the filter will be
much the same when using the internal oscillator. The figures
illustrate that when the converter is operated at 10Sps the digital
filter provides excellent rejection of 50Hz and 60Hz line
interference.
FIGURE 24. SIMPLIFIED PROGRAMMABLE GAIN AMPLIFIER BLOCK DIAGRAM
+
-
A1
-
+
A2
AINx-
AINx+
ADC
RINT
R1
RF1
RF2
CAP
FIGURE 25. CLOCK BLOCK DIAGRAM
XTALIN/
CRYSTAL
OSCILLATOR
XTALOUT
TO ADC
INTERNAL
OSCILLATOR
CLOCK DETECT
MUX
EN
CLOCK
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參數(shù)描述 |
|---|---|
| ISL26134AVZ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC ISL26134AVZ LW-NOISE 24-BIT TI-COMP D/S RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ISL26134AVZ-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC ISL26134AVZ LW-NOISE 24-BIT TI-COMP D/S RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ISL26134AVZ-T7A | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC ISL26134AVZ LW-NOISE 24BIT DELTASIGMA ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ISL26310 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:12-bit, 125kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels |
| ISL26310FBZ | 功能描述:IC ADC 12BIT SPI/SRL 125K 8SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極 |
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