16 FN6954.1 September 9, 2011 Offset Calibration Control The offset internal to the ADC can be removed by performing an offs" />
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  1. 參數(shù)資料
    型號(hào): ISL26134AVZ
    廠商: Intersil
    文件頁數(shù): 8/23頁
    文件大?。?/td> 0K
    描述: IC ADC 24BIT SRL 80SPS 28TSSOP
    標(biāo)準(zhǔn)包裝: 500
    位數(shù): 24
    采樣率(每秒): 80
    數(shù)據(jù)接口: 串行
    轉(zhuǎn)換器數(shù)目: 1
    功率耗散(最大): 80mW
    電壓電源: 模擬和數(shù)字
    工作溫度: -40°C ~ 105°C
    安裝類型: 表面貼裝
    封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
    供應(yīng)商設(shè)備封裝: 28-TSSOP
    包裝: 管件
    輸入數(shù)目和類型: 4 個(gè)差分,雙極
    ISL26132, ISL26134
    16
    FN6954.1
    September 9, 2011
    Offset Calibration Control
    The offset internal to the ADC can be removed by performing an
    offset calibration operation. Offset calibration can be initiated
    immediately after reading a conversion word with 24 SCLKs by
    issuing two additional SCLKs. The offset calibration operation will
    begin immediately after the 26th SCLK occurs. Figure 32
    illustrates the timing details for the offset calibration operation.
    During offset calibration, the analog inputs are shorted internally
    and a regular conversion is performed. This conversion generates
    a conversion word that represents the offset error. This value is
    stored and used to digitally remove the offset error from future
    conversion words. The SDO/RDY output will fall to indicate the
    completion of the offset calibration operation.
    TABLE 10. INTERFACE TIMING CHARACTERISTICS
    PARAMETER
    DESCRIPTION
    MIN
    TYP
    MAX
    UNITS
    t2
    SDO/RDY Low to first SLK
    0
    ns
    t3
    SCLK pulsewidth, Low or High
    100
    ns
    t4
    SCLK High to Data Valid
    50
    ns
    t5
    Data Hold after SCLK High
    0
    ns
    t6
    Register Update Time
    39
    s
    t7
    Conversion Period
    SPEED = 1
    12.5
    ms
    SPEED = 0
    100
    ms
    FIGURE 31. OUTPUT DATA WAVEFORMS FOR SDO/RDY POLLING
    NEW DATA READY
    DATA READY
    SDO/RDY
    SCLK
    23
    22
    21
    0
    24
    1
    25
    DATA
    25TH SCLK FORCES
    SDO/RDY HIGH
    FIGURE 32. OFFSET CALIBRATION WAVEFORMS
    DATA READY AFTER CALIBRATION
    CALIBRATION BEGINS
    SDO/RDY
    SCLK
    23
    22
    21
    0
    23
    24
    25
    26
    1
    t8
    FIGURE 33. STANDBY MODE WAVEFORMS
    DATA READY
    START
    CONVERSION
    STANDBY MODE
    SDO/RDY
    SCLK
    23
    22
    21
    0
    1
    24
    t11
    t10
    t9
    23
    TABLE 11. SDO/RDY DELAY AFTER CALIBRATION
    PARAMETER
    MIN
    MAX
    UNITS
    t8
    SPEED = 1
    108
    109
    ms
    SPEED = 0
    808
    809
    ms
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