18 FN7532.4 March 5, 2013 Power Dissipation It is possible to exceed the +150°C maximum junction temperatures under certain " />
參數(shù)資料
型號: ISL28118FBZ
廠商: Intersil
文件頁數(shù): 10/26頁
文件大小: 0K
描述: IC OPAMP PREC R-R 4MHZ LP 8SOIC
產(chǎn)品培訓(xùn)模塊: Solutions for Industrial Control Applications
標準包裝: 97
放大器類型: 通用
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 1.2 V/µs
增益帶寬積: 4MHz
電流 - 輸入偏壓: 230nA
電壓 - 輸入偏移: 25µV
電流 - 電源: 850µA
電流 - 輸出 / 通道: 28mA
電壓 - 電源,單路/雙路(±): 3 V ~ 40 V,-1.2 V/+1.8 V ~ ±20 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
ISL28118, ISL28218
18
FN7532.4
March 5, 2013
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power supply conditions. It
is therefore important to calculate the maximum junction
temperature (TJMAX) for all applications to determine if power
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These parameters
are related using Equation 1:
where
PDMAXTOTAL is the sum of the maximum power dissipation of
each amplifier in the package (PDMAX)
TMAX = Maximum ambient temperature
ΘJA = Thermal resistance of the package
PDMAX for each amplifier can be calculated using Equation 2:
where
PDMAX = Maximum power dissipation of 1 amplifier
VS = Total supply voltage
IqMAX = Maximum quiescent supply current of one amplifier
VOUTMAX = Maximum output voltage swing of the application
RL = Load resistance
ISL28118 and ISL28218 SPICE Model
Figure 64 shows the SPICE model schematic and Figure 65 shows
the net list for the SPICE model. The model is a simplified version
of the actual device and simulates important AC and DC
parameters. AC parameters incorporated into the model are: 1/f
and flatband noise voltage, slew rate, CMRR, and gain and phase.
The DC parameters are IOS, total supply current, and output
voltage swing. The model uses typical parameters given in the
“Electrical Specifications” table beginning on page 3. The AVOL is
adjusted for 136dB with the dominant pole at 0.6Hz. The CMRR is
set at 120dB, f = 50kHz. The input stage models the actual device
to present an accurate AC representation. The model is configured
for an ambient temperature of +25°C.
Figures 66 through 80 show the characterization vs simulation
results for the noise voltage, open loop gain phase, closed loop
gain vs frequency, gain vs frequency vs RL, CMRR, large signal
10V step response, small signal 0.1V step, and output voltage
swing ±15V supplies.
LICENSE STATEMENT
The information in the SPICE model is protected under United
States copyright laws. Intersil Corporation hereby grants users of
this macro-model, hereto referred to as “Licensee”, a
nonexclusive, nontransferable licence to use this model, as long
as the Licensee abides by the terms of this agreement. Before
using this macro-model, the Licensee should read this license. If
the Licensee does not accept these terms, permission to use the
model is not granted.
The Licensee may not sell, loan, rent, or license the
macro-model, in whole, in part, or in modified form, to anyone
outside the Licensee’s company. The Licensee may modify the
macro-model to suit his/her specific applications, and the
Licensee may make copies of this macro-model for use within
their company only.
This macro-model is provided “AS IS, WHERE IS, AND WITH NO
WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED,
INCLUDING, BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.”
In no event will Intersil be liable for special, collateral, incidental,
or consequential damages in connection with, or arising out of,
the use of this macro-model. Intersil reserves the right to make
changes to the product and the macro-model without prior
notice.
TJMAX
TMAX θJAxPDMAXTOTAL
+
=
(EQ. 1)
PDMAX
VS IqMAX VS
(
- VOUTMAX)
VOUTMAX
RL
------------------------
×
+
×
=
(EQ. 2)
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