參數(shù)資料
型號(hào): ISL28270IAZ
廠商: Intersil
文件頁(yè)數(shù): 8/18頁(yè)
文件大?。?/td> 0K
描述: IC INSTR AMP RRIO DUAL 16-QSOP
標(biāo)準(zhǔn)包裝: 97
放大器類(lèi)型: 儀表
電路數(shù): 2
輸出類(lèi)型: 滿(mǎn)擺幅
轉(zhuǎn)換速率: 0.5 V/µs
-3db帶寬: 240kHz
電流 - 輸入偏壓: 500pA
電壓 - 輸入偏移: 35µV
電流 - 電源: 120µA
電流 - 輸出 / 通道: 29mA
電壓 - 電源,單路/雙路(±): 2.4 V ~ 5.5 V,±1.2 V ~ 2.75 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 管件
16
FN6260.6
October 21, 2009
the in-amp maintains constant differential voltage across the
input terminals and feedback terminals (FB- - FB+) =
(IN+ - IN-), the transfer function of Figure 51 can be derived
from Equation 3. Note that the VREF gain term is eliminated,
and susceptibility to external noise is reduced.
A finite resistance RS in series with the VREF source, adds
an output offset of VIN*(RS/RG). As the series resistance RS
approaches zero, Equation 3 is simplified to Equation 4 for
Figure 51. VOUT is simply shifted by an amount VREF.
External Resistor Mismatches
Because of the independent pair of feedback terminals
provided by the in-amps, the CMRR is not degraded by any
resistor mismatches. Hence, unlike a three op amp and
especially a two op amp in-amp realization, the ISL28270,
ISL28273 and ISL28470 reduce the cost of external
components by allowing the use of 1% or more tolerance
resistors without sacrificing CMRR performance. The CMRR
will be typically 110dB regardless of the tolerance of the
resistors used. Instead, a resistor mismatch results in a
higher deviation from the theoretical gain - gain error.
Gain Error and Accuracy
The gain error indicated in the “Electrical Specifications”
table on page 4 is the inherent gain error alone. The gain
error specification listed does not include the gain error
contributed by the resistors. There is an additional gain error
due to the tolerance of the resistors used. The resulting
non-ideal transfer function effectively becomes: (see
Equation 5)
Where:
ERG = Tolerance of RG
ERF = Tolerance of RF
EG = Gain Error of the ISL28270
The term [1 - (ERG +ERF +EG)] is the deviation from the
theoretical gain. Thus, (ERG +ERF +EG) is the total gain
error. For example, if 1% resistors are used, the total gain
error would be shown in Equation 6.
Disable/Power-Down
The ISL28270 and ISL28470 have an enable/disable pin for
each channel. They can be powered down to reduce the
supply current to typically 4A when all channels are off.
When disabled, the corresponding output is in a high
impedance state. The active low EN pin has an internal pull
down and hence can be left floating and the in-amp enabled
by default. When the EN is connected to an external logic,
the in-amp will shutdown when EN pin is pulled above 2V,
and will power up when EN bar is pulled below 0.8V.
Unused Channels
The ISL28270, ISL28273 and ISL28470 are dual and quad
channel op amps. If the application only requires one
channel when using the ISL28270, ISL28273 or less than 4
channels when using the ISL28470, the user must configure
the unused channel(s) to prevent them from oscillating. The
unused channel(s) will oscillate if the input and output pins
are floating. This will result in higher than expected supply
currents and possible noise injection into the channel being
used. The proper way to prevent this oscillation is to short
the IN+ and IN- terminals to ground and short the FB+, FB-
and the output terminals to ground as shown in Figure 52.
FIGURE 51. REFERENCE CONNECTION WITH AN AVAILABLE
VREF
+
-
+
-
IN+
IN-
FB+
FB-
V+
V-
2.4V TO 5.5V
RF
RG
VOUT
VCM
IN+
IN-
VREF
RS
(ISL28270, ISL28470)
VIN
IN+
IN-
=
(EQ. 3)
VOUT
1
R
S
R
F
+
R
G
----------------------
+
VREF
+
=
(EQ. 4)
VOUT
1
R
F
R
G
--------
+
VIN
()
VREF
()
+
=
VOUT
1
R
F
R
G
--------
+
1E
RG
E
RF
E
G
++
()
±
[] VIN
×
=
(EQ. 5)
TotalGainError
E
RG
E
RF
E
G typical
()
++
()
±
=
TotalGainError
0.01
0.005
++
()
2.5%
±
=
±
=
(EQ. 6)
FIGURE 52. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
-
+
1/2 ISL28270, ISL28273
1/4 ISL28470
-
+
IN+
IN-
FB+
FB-
ISL28270, ISL28273, ISL28470
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