![](http://datasheet.mmic.net.cn/Intersil/ISL3178EIBZ-T7A_datasheet_97609/ISL3178EIBZ-T7A_8.png)
8
FN6307.5
June 8, 2012
Receiver Disable from Output High
tHZ
RL = 1kΩ, CL = 15pF,
ISL3170E-75E
Full
5
12
20
ns
ISL3176E-78E
Full
4
7
15
ns
Receiver Disable from Output Low
tLZ
RL = 1kΩ, CL = 15pF,
ISL3170E-75E
Full
5
13
20
ns
ISL3176E-78E
Full
4
7
15
ns
Time to Shutdown
tSHDN
Full
50
180
600
ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), Full
-
240
500
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), Full
-
240
500
ns
NOTES:
5. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
6. Supply current specification is valid for loaded drivers when DE = 0V.
7. Applies to peak current. See “Typical Performance Curves” starting on
page 12 for more information.
8. When testing devices with the shutdown feature, keep RE = 0 to prevent the device from entering SHDN.
9. When testing devices with the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from
entering SHDN.
10. Versions with a shutdown feature are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the
parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown.
11. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
12. Set the RE signal high time >600ns to ensure that the device enters SHDN.
13. Does not apply to the ISL3171E, ISL3174E and ISL3177E.
14.
ΔtSKEW is the magnitude of the difference in propagation delays of the specified terminals of two units tested with identical test conditions (VCC,
temperature, etc.). Only applies to the ISL3176E through ISL3178E.
15. ISL3170E through ISL3175E only.
16. VCC ≥ 3.15V
17. Limits established by characterization and are not production tested.
18. If the Tx or Rx enable function isn’t needed, connect the enable pin to the appropriate supply (see
“Pin Descriptions” on page 3) through a 1k
Ω
to 3k
Ω resistor.
19. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
20. If the DE or RE input voltage exceeds the VCC voltage by more than 500mV, then current will flow into the logic pin. The current is limited by a
340 resistor (so ≈13mA with VIN = 5V and VCC = 0V) so no damage will occur if VCC ≤ VIN ≤ 7V for short periods of time.
Test Circuits and Waveforms
FIGURE 1A. VOD AND VOC
FIGURE 1B. VOD WITH COMMON MODE LOAD
FIGURE 1. DC DRIVER TEST CIRCUITS
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = +25°C,
(Note 5)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 19)
TYP
MAX
(Note 19) UNITS
D
DE
DI
VCC
VOD
VOC
RL/2
Z
Y
D
DE
DI
VCC
VOD
375
Ω
375
Ω
Z
Y
RL = 60Ω
VCM
-7V to +12V
ISL3170E, ISL3171E, ISL3172E, ISL3173E, ISL3174E, ISL3175E,ISL3176E, ISL3177E, ISL3178E