參數資料
| 型號： | ISL34321INZ |
| 廠商： | Intersil |
| 文件頁數： | 9/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SER/DESER LVDS SERDES 48TQFP |
| 產品培訓模塊： | Solutions for Industrial Control Applications |
| 標準包裝： | 250 |
| 功能： | 串行器/解串器 |
| 輸入類型： | LVTTL/LVCMOS |
| 輸出類型： | LVTTL，LVCMOS |
| 輸入數： | 2 |
| 輸出數： | 2 |
| 電源電壓： | 1.7 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP 裸露焊盤 |
| 供應商設備封裝： | 48-TQFP 裸露焊盤（7x7） |
| 包裝： | 托盤 |
ISL34321
5
FN6870.1
September 23, 2010
Absolute Maximum Ratings
Thermal Information
Supply Voltage
VDD_P to GND_P, VDD_TX to GND_TX,
VDD_IO to GND_IO . . . . . . . . . . . . . . . . -0.5V to 4.6V
VDD_CDR to GND_CDR, VDD_CR to GND_CR -0.5V to 2.5V
Between any pair of GND_P, GND_TX,
GND_IO, GND_CDR, GND_CR . . . . . . . . . . -0.1V to 0.1V
3.3V Tolerant LVTTL/LVCMOS
Input Voltage . . . . . . . . . . . . . . . .-0.3V to VDD_IO+0.3V
Differential Input Voltage . . . . . . . .-0.3V to VDD_IO + 0.3V
Differential Output Current . . . . . . . . Short Circuit Protected
LVTTL/LVCMOS Outputs . . . . . . . . . . Short Circuit Protected
ESD Rating
Human Body Model
All pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4kV
SERIOP/N (all VDD Connected, all GND Connected) . 8kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 200V
Latch Up (Tested per JESD-78B; Class2, Level A). . . .100mA
Thermal Resistance (Typical)
θJA
θJC (°C/W)
38
12
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . 327mW
Maximum Junction Temperature . . . . . . . . . . . . . . +125°C
Maximum Storage Temperature Range . . . -65°C to +150°C
Operating Temperature Range . . . . . . . . . . -40°C to +85°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
6. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
7. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Unless otherwise indicated, all data is for: VDD_CDR = VDD_CR = 1.8V, VDD_IO = 3.3V,
VDD_TX = VDD_P = VDD_AN = 3.3V, TA = +25°C, Ref_Res = 3.16kΩ, High-speed
AC-coupling capacitor = 27nF.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER SUPPLY VOLTAGE
VDD_CDR, VDD_CR
1.7
1.8
1.9
V
VDD_TX, VDD_P, VDD_AN, VDD_IO
3.0
3.3
3.6
V
SERIALIZER POWER SUPPLY CURRENTS
Total 1.8V Supply Current
PCLK_IN = 45MHz
62
80
mA
Total 3.3V Supply Current
(Note 8)
40
52
mA
DESERIALIZER POWER SUPPLY CURRENTS
Total 1.8V Supply Current
PCLK_IN = 45MHz
66
76
mA
Total 3.3V Supply Current
(Note 8)
50
63
mA
POWER-DOWN SUPPLY CURRENT
Total 1.8V Power-Down Supply Current
RSTB = GND
10
mA
Total 3.3V Power-Down Supply Current
0.5
mA
PARALLEL INTERFACE
High Level Input Voltage
VIH
2.0
V
Low Level Input Voltage
VIL
0.8
V
Input Leakage Current
IIN
-1
±0.01
1
A
High Level Output Voltage
VOH
IOH = -4.0mA,
VDD_IO = 3.0V
2.6
V
Low Level Output Voltage
VOL
IOL = 4.0mA,
VDD_IO = 3.6V
0.4
V
Output Short Circuit Current
IOSC
35
mA
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