6 FN6971.1 March 25, 2010 Operation The ISL35411 is an advanced driver for high-speed interconnects. A functional diagram of ISL35411 " />
參數(shù)資料
型號: ISL35411DRZ-EVALZ
廠商: Intersil
文件頁數(shù): 8/11頁
文件大小: 0K
描述: EVAL BAORD FOR ISL35411DRZ
標(biāo)準(zhǔn)包裝: 1
系列: *
ISL35411
6
FN6971.1
March 25, 2010
Operation
The ISL35411 is an advanced driver for high-speed
interconnects. A functional diagram of ISL35411 is
shown in Figure 4. In addition to a de-emphasis circuit
to compensate for channel loss and improve signal
fidelity, the ISL35411 contains unique integrated features
to preserve special signaling protocols typically broken by
other drivers. The signal detect function is used to mute
the channel output when the equalized signal falls below
the level determined by the Detection Threshold (DT) pin
voltage. This function is intended to preserve periods of
line silence
As illustrated in Figure 4, the core of the high-speed
signal path in the ISL35411 is a sophisticated driver
followed by a de-emphasis circuit. The device applies
pre-distortion to compensate for skin effect loss,
dielectric loss, and impedance discontinuities in the
transmission channel.
Typical Performance Characteristics
Performance is measured using the test setup illustrated in Figure 1. The signal from the pattern generator is launched
into the chip evaluation board. The ISL35411 output signal is then visualized on a scope to determine signal integrity
parameters such as jitter.
FIGURE 1. DEVICE CHARACTERIZATION TEST SETUP
2A. DE-EMPHASIS 0
2B. DE-EMPHASIS 6
FIGURE 2. ISL35411 10.3125Gbps OUTPUT; NO CHANNEL; PRBS-31
FIGURE 3. ISL35411 10.3125 GBPS OUTPUT AFTER A 22-INCH FR-408 TRACE, PRBS-31; DE-EMPHASIS 6
P a tte r n
G ene r a to r
IS L 3 5 411 E v al
Bo a r d
O s c illo s c o p e
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