10
Detailed Description
The ISL43841 analog switch offers a precise switching
capability from a bipolar ±2V to ±6V or a single 2V to 12V
supply with low on-resistance (39
) and high speed
operation (tON = 38ns, tOFF = 19ns) with dual 5V supplies.
It has an latch bar pin to lock in the last switch address.
The device is especially well suited for applications using
±5V supplies. With ±5V supplies the performance (RON,
Leakage, Charge Injection, ect.) is best in class.
High frequency applications also benefit from the wide
bandwidth, and the very high off isolation and crosstalk
rejection.
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to V+(see
Figure
9). To prevent forward biasing these diodes, V+ and
V- must be applied before any input signals, and input signal
voltages must remain between V+ and V-. If these conditions
cannot be guaranteed, then one of the following two
protection methods should be employed.
Logic inputs can easily be protected by adding a 1k
resistor in series with the input (see Figure
9). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
FIGURE 5. OFF ISOLATION TEST CIRCUIT
FIGURE 6. RON TEST CIRCUIT
FIGURE 7. CROSSTALK TEST CIRCUIT
FIGURE 8. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms (Continued)
ANALYZER
RL
SIGNAL
GENERATOR
0V or V+
NOX
COMX
ADDX
GND
V-
C
V+
C
LATCH
0V or V+
NOX
COMX
ADDX
GND
VNX
V1
RON = V1/1mA
1mA
V-
C
V+
C
LATCH
0V or V+
ANALYZER
NOA
SIGNAL
GENERATOR
RL
GND
ADDX
50
N.C.
COMB
NOB
V-
C
V+
C
COMA
LATCH
GND
NOX
COMX
ADDX
IMPEDANCE
ANALYZER
0V or V+
V-
C
V+
C
LATCH
ISL43841