- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16353 > ISL54062EVAL1Z (Intersil)EVALUATION BOARD FOR ISL54062 PDF資料下載
參數(shù)資料
| 型號： | ISL54062EVAL1Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVALUATION BOARD FOR ISL54062 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，2:1 多路復(fù)用器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ISL54062 |
| 主要屬性： | 2 x SPDT 模擬開關(guān) |
| 次要屬性： | 1.8 V ~ 6.5 V 電源 |
| 已供物品： | 板 |
9
FN6581.1
November 3, 2009
Detailed Description
The ISL54062 is a bi-directional, dual single pole-double
throw (SPDT) analog switch that offers precise switching
from a single 1.8V to 6.5V supply with low ON-resistance
(0.83
Ω), high speed operation (tON =55ns, tOFF = 18ns) and
negative signal swing capability. The device is especially
well suited for portable battery powered equipment due to its
low operating supply voltage (1.8V), low power consumption
(20nA @ 3V), and a tiny 1.8mmx1.4mm
TQFN package or a
3x3 TDFN package. The low ON-resistance and rON flatness
provide very low insertion loss and signal distortion for
applications that require signal switching with minimal
interference by the switch.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. The ISL54062
contains ESD protection diodes on each pin of the IC
(see Figure 9). These diodes connect to either a +Ring or
-Ring for ESD protection. To prevent forward biasing the
ESD diodes to the +Ring, V+ must be applied before any
input signals, and the input signal voltages must remain
between recommended operating range.
If these conditions cannot be guaranteed, then precautions
must be implemented to prohibit the current and voltage at
the logic pin and signal pins from exceeding the maximum
ratings of the switch. The following two methods can be used
to provided additional protection to limit the current in the
event that the voltage at a logic pin or switch terminal goes
above the V+ rail.
Logic inputs can be protected by adding a 1k
Ω resistor in
series with the logic input (see Figure 9). The resistor limits
the input current below the threshold that produces
permanent damage.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low rON switch. Alternatively, connecting
external Schottky diodes from the V+ rail to the signal pins
will shunt the fault current through the Schottky diode
instead of through the internal ESD diodes, thereby
protecting the switch. These Schottky diodes must be sized
to handle the expected fault current.
Power-Supply Considerations
The ISL54062 construction is typical of most single supply
CMOS analog switches which have two supply pins: V+ and
GND. V+ and GND provide the CMOS switch bias and sets
their analog voltage limits. Unlike switches with a 5.5V
maximum supply voltage, the ISL54062’s 6.5V maximum
supply voltage provides plenty of head room for the 10%
tolerance of 5V supplies due to overshoot and noise spikes.
FIGURE 8A. CLICK AND POP WAVEFORM
FIGURE 8B. CLICK AND POP TEST CIRCUIT
FIGURE 8. CLICK AND POP ELIMINATION
Test Circuits and Waveforms (Continued)
tD
VDC
VINx*
*VINx waveform for Click and Pop Elimination on NOx terminal.
For Click and Pop Elimination on NCx terminal invert VINx.
tD = 200ms measured at 50% points.
0V
tD
CLICK AND POP
CIRCUITRY
RL
220uF
INx
COMx
NCx
NOx
VDC
GND
VCOMx
VNCx
V+
LOGIC
INPUTS
VNOx
-RING
+RING
CLAMP
1k
Ω
FIGURE 9. OVERVOLTAGE PROTECTION
ISL54062
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UPJ1E332MHD | CAP ALUM 3300UF 25V 20% RADIAL |
| GCC20DRTS | CONN EDGECARD 40POS DIP .100 SLD |
| 1-6754413-7 | CA,XG,MTRJ-SC |
| EET-ED2E391DA | CAP ALUM 390UF 250V 20% SNAP |
| REC3.5-0509DRW/R8/C | CONV DC/DC 3.5W 4.5-9VIN +/-09VO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL54062IRTZ | 功能描述:IC SWITCH SPDT DUAL 10TDFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:36 系列:- 功能:多路復(fù)用器 電路:2 x 4:1 導(dǎo)通狀態(tài)電阻:75 歐姆 電壓電源:單/雙電源 電壓 - 電源，單路/雙路(±):2 V ~ 12 V，±2 V ~ 6 V 電流 - 電源:- 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:20-SOIC W 包裝:管件 |
| ISL54062IRTZ-T | 功能描述:IC SWITCH SPDT DUAL 10TDFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:36 系列:- 功能:多路復(fù)用器 電路:2 x 4:1 導(dǎo)通狀態(tài)電阻:75 歐姆 電壓電源:單/雙電源 電壓 - 電源，單路/雙路(±):2 V ~ 12 V，±2 V ~ 6 V 電流 - 電源:- 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:20-SOIC W 包裝:管件 |
| ISL54062IRUZ | 制造商:Intersil 功能描述:Negative Signal Swing, Sub-ohm, Dual SPDT with Click and Pop Elimination Single Supply Switch |
| ISL54062IRUZ-T | 功能描述:IC SWITCH SPDT DUAL 10TQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:36 系列:- 功能:多路復(fù)用器 電路:2 x 4:1 導(dǎo)通狀態(tài)電阻:75 歐姆 電壓電源:單/雙電源 電壓 - 電源，單路/雙路(±):2 V ~ 12 V，±2 V ~ 6 V 電流 - 電源:- 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:20-SOIC W 包裝:管件 |
| ISL54063 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:1.8V to +6.5V, Sub-ohm, Dual SPST |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。