參數(shù)資料
型號: ISL54103IHZ-T7A
廠商: Intersil
文件頁數(shù): 1/8頁
文件大?。?/td> 0K
描述: IC ACCELERATOR DDCA DUAL SOT23-5
標(biāo)準(zhǔn)包裝: 1
類型: 纜線,DDCA
端子數(shù): 2
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: SC-74A,SOT-753
供應(yīng)商設(shè)備封裝: SOT-23-5
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: ISL54103IHZ-T7ADKR
1
FN6303.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|Copyright Intersil Americas Inc. 2006, 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL54103
DDC Accelerator (DDCA)
The ISL54103 DDC Accelerator (DDCA) is a dual active pull-up
bus terminator designed to improve data transmission speed
on the DDC 2-wire serial bus interfaces.
The DDCA detects rising input transitions with two internal
voltage references and two comparators per channel. After
the voltage on a data line crosses the first threshold
(VTRIPL), the boost pull-up current source is activated to
speed transition. After the voltage crosses the second
threshold (VTRIPH), the boost pull-up current source is
de-activated, leaving an active pull-up current of 275A on
the line. When both channels are HIGH, the pull-up current
for both lines is reduced to 100A to save power. Internal
logic ensures that the active and boost pull-up current
sources are not activated during downward transitions.
The level for VTRIPH is controlled by a bandgap voltage
referred to VDD. This feature makes the switching behavior
invariant for all power supply voltages between 2.7V and 5.5V.
A noise filter on each channel prevents the circuit from
responding to input transitions that do not exceed a
voltage-time threshold. To activate the boost circuit, the input
must exceed VTRIPL by 100Vns (typical) (See Figure 10).
The DDCA permits operation of the bus at frequencies up to
100kHz, despite the capacitive loads of multiple devices
and/or long PC board traces. Enhanced ESD protection on
the accelerator pins are guaranteed to withstand 8kV ESD
(HBM) events.
The DDC Accelerator provides an essential function in DDC
applications because of distributed capacitance of the DDC
wires in long video cables. By incorporating DDCA, systems
using DDC can reliably increase their bus load, allowing
longer cables, without the risk of data corruption.
Features
Active Termination for DDC Lines
Enhances System Bus Signal Rise Time
More Reliable HDCP Performance In Video Multiplexers
and Cable Extenders
Increases Maximum Cable Length While Guaranteeing
Data Integrity
2.2mA Current Boost on Low to High Transitions
8kV ESD Protection on SDA and SCL Pins
Wide Operating Voltage Range: 2.7V to 5.5V
Small Package - 5 Ld SOT-23
Pb-free (RoHS Compliant)
Target Applications
Video Multiplexers
Video Cable Extenders
Video Distribution Amplifiers
Televisions
Computer Monitors
Projectors
Pinout
ISL54103
(5 LD SOT-23)
TOP VIEW
VDD
1
2
3
4
5
N.C.
DDC1
GND
DDC2
Data Sheet
October 14, 2011
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