參數(shù)資料
型號(hào): ISL54105CRZ
廠商: Intersil
文件頁數(shù): 6/16頁
文件大小: 0K
描述: IC TMDS REGENERATOR 72-QFN
標(biāo)準(zhǔn)包裝: 1,680
應(yīng)用: 多媒體顯示器,測(cè)試設(shè)備
接口: I²C
電源電壓: 3 V ~ 3.6 V
封裝/外殼: 72-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 72-QFN(10x10)
包裝: 托盤
安裝類型: 表面貼裝
14
FN6723.0
June 11, 2008
SCL FROM
HOST
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
8
1
9
START
ACKNOWLEDGE
FIGURE 15. ACKNOWLEDGE RESPONSE FROM RECEIVER
SCL
SDA
DATA STABLE
DATA CHANGE
DATA STABLE
FIGURE 16. VALID DATA CHANGES ON THE SDA BUS
D7
D6
D5
D2
D4
D3
D1
D0
A0
A7
A2
A4
A3
A1
ISL54105 Register Data Write(s)
This is the data to be written to the ISL54105’s configuration register.
Note: The ISL54105’s Configuration Register’s address pointer auto
increments after each data write: repeat this step to write multiple
sequential bytes of data to the Configuration Register.
A6
A5
0
R/W
ISL54105 Register Address Write
This is the address of the ISL54105’s configuration register that
the following byte will be written to.
ISL54105 Serial Bus
FIGURE 17. CONFIGURATION REGISTER WRITE
START Command
STOP Command
(Repeat if desired)
Signals the beginning of serial I/O
Signals the ending of serial I/O
S
T
A
R
T
S
T
O
P
Data
Write*
Register
Address
Serial Bus
Address
A
C
K
AAAAAAAA
A
C
K
dddddddd
A
C
K
aaaaaaa0
* The data write step may be repeated to write to the
ISL54105’s Configuration Register sequentially, beginning at
the Register Address written in the previous step.
SDA Bus
Signals from
the ISL54105
Signals from
the Host
ISL54105 Device Select Address Write
The first 7 bits of the first byte select the ISL54105 on the 2-wire
bus at the address set by the ADDR[6:0} pins. The R/W bit is a
0, indicating that the next transaction will be a write.
ADDR1 ADDR0
ADDR3 ADDR2
ADDR5 ADDR4
ADDR6
ISL54105
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