6 FN6408.2 June 17, 2010 FSx OFF Capacitance, CFSxOFF f = 1MHz, V
參數(shù)資料
型號(hào): ISL54200IRZ
廠商: Intersil
文件頁(yè)數(shù): 15/18頁(yè)
文件大?。?/td> 0K
描述: IC USB SWITCH DUAL SPDT 10TDFN
標(biāo)準(zhǔn)包裝: 100
功能: USB 開關(guān)
電路: 2 x SPDT
導(dǎo)通狀態(tài)電阻: 30 歐姆
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 2.7 V ~ 5.5 V
電流 - 電源: 20nA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-VFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 10-TDFN/MLP(3x3)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1247 (CN2011-ZH PDF)
ISL54200
6
FN6408.2
June 17, 2010
FSx OFF Capacitance, CFSxOFF f = 1MHz, VDD = 3.3V, IN = 3.3V, EN = 3.3V,
VFSD1 or VFSD2 = VCOMx = 0V, (See Figure 5)
+25
-
9
-
pF
COM ON Capacitance,
CCOMX(ON)
f = 1MHz, VDD = 3.3V, IN = 3.3V, EN = 3.3V,
VHSD1 or VHSD2 = VCOMx = 0V, (See Figure 5)
+25
-
12
-
pF
COM ON Capacitance,
CCOMX(ON)
f = 1MHz, VDD = 3.3V, IN = 0V, EN = 3.3V,
VFSD1 or VFSD2 = VCOMx = 0V, (See Figure 5)
+25
-
15
-
pF
POWER SUPPLY CHARACTERISTICS
Power Supply Range, VDD
Full
2.7
-
5.5
V
Positive Supply Current, IDD
VDD = 3.6V, IN = 0V or 3.6V, EN = 0V or 3.6V +25
-
20
60
nA
Full
-
500
nA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL, VENL VDD = 2.7V to 3.6V
Full
-
0.5
V
Input Voltage High, VINH, VENH VDD = 2.7V to 3.6V
Full
1.4
--
V
Input Current, IINL, IENL
VDD = 3.6V, IN = 0V, EN = 0V
Full
-
10
-
nA
Input Current, IINH
VDD = 3.6V, IN = 3.6
Full
-
10
-
nA
Input Current, IENH
VDD = 3.6V, EN = 3.6
Full
-
1
-
μA
NOTES:
11. VLOGIC = Input voltage to perform proper function.
12. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data
sheet.
13. Parts are 100% tested at +25°C. Over temperature limits established by characterization and are not production tested.
14. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal
range.
15. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with
lowest max rON value, between HSD2 and HSD1 or between FSD2 and FSD1.
Test Circuits and Waveforms
Logic input waveform is inverted for switches that have the
opposite logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V,
VENH = 1.4V, VENL = 0.5V, (Note 11), Unless Otherwise Specified. Bold-
face limits apply over the operating temperature range, -40°C to
+85°C. (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 12, 13) TYP
MAX
(Notes 12, 13) UNITS
50%
tr < 20ns
tf < 20ns
tOFF
90%
VINH
0V
VINPUT
VINL
tON
LOGIC
INPUT
SWITCH
INPUT
SWITCH
OUTPUT
90%
VOUT
VOUT
V(INPUT)
RL
RL rON
+
------------------------
=
SWITCH
INPUT
VIN
VOUT
RL
CL
COMx
HSx or FSx
IN
45Ω
10pF
GND
VDD
EN
VINPUT
ISL54200
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