10 FN7614.1 September 12, 2013 ISL54226 Operation The following will discuss using the ISL54226 shown in the “Application Block Diagra" />
參數(shù)資料
型號: ISL54226IRUZ-T
廠商: Intersil
文件頁數(shù): 2/17頁
文件大?。?/td> 0K
描述: IC USB SWITCH DPST OVP 8TQFN
標(biāo)準(zhǔn)包裝: 3,000
功能: 開關(guān)
電路: 2 x SPST
導(dǎo)通狀態(tài)電阻: 17 歐姆
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 2.7 V ~ 5.25 V
電流 - 電源: 45µA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-XFQFN
供應(yīng)商設(shè)備封裝: 8-UTQFN(1.2x1.4)
包裝: 帶卷 (TR)
ISL54226
10
FN7614.1
September 12, 2013
ISL54226 Operation
The following will discuss using the ISL54226 shown in the
Power
The power supply connected at the VDD pin provides the DC bias
voltage required by the ISL54226 part for proper operation. The
ISL54226 can be operated with a VDD voltage in the range of
2.7V to 5.25V.
For lowest power consumption you should use the lowest VDD
supply.
A 0.01F or 0.1F decoupling capacitor should be connected
from the VDD pin to ground to filter out any power supply noise
from entering the part. The capacitor should be located as close
to the VDD pin as possible.
In a typical application, VDD will be in the range of 2.8V to 4.3V
and will be connected to the battery or LDO of the portable
media device.
Logic Control
The state of the ISL54226 device is determined by the voltage at
the OE/ALM pin and the signal voltage at the COM pins. Refer to
The OE/ALM pin is internally pulled low through 4M resistors to
ground and can be tri-stated by a Processor.
The OE/ALM pin is an open drain connection. It should be pulled
high through an external 100k pull-up resistor. The OE/ALM pin
can then be driven “Low” by a Processor to open all switches or
it can be monitored by the Processor for a “Low” when the part
goes into an overvoltage condition.
The ISL54226 is designed to minimize IDD current consumption
when the logic control voltage is lower than the VDD supply
voltage. With VDD = 3.6V and the OE/ALM logic pin is at 1.4V the
part typically draws only 25A. With VDD = 4.3V and the OE/ALM
logic pin is at 2.6V the part typically draws only 35A. Driving the
logic pin to the VDD supply rail minimizes power consumption.
The OE/ALM pin can be driven with a voltage higher than the VDD
supply voltage. It can be driven up to 5.25V with a VDD supply in
the range of 2.7V to 5.25V.
Normal Operation Mode
With a signal level in the range of 0V to 3.6V the switches will be
ON when the OE/ALM pin = Logic “1” and will be OFF (high
impedance) when the OE/ALM pin = Logic “0”.
USB 2.0 VBUS Short Requirements
The USB specification in section 7.1.1 states a USB device must
be able to withstand a VBUS short (4.4V to 5.25V) or a -1V short to
the D+ or D- signal lines when the device is either powered off or
powered on for at least 24 hours.
The ISL54226 part has special power-off protection and OVP
detection circuitry to meet these short circuit requirements. This
circuitry allows the ISL54226 to provide protection to the USB
down-stream transceiver connected at its signal pins (D-, D+) to
meet the USB specification short circuit requirements.
The power-off protection and OVP circuitry allows the COM pins
(COM-, COM+) to be driven up to 5.25V or down to -5V while the
VDD supply voltage is in the range of 0V to 5.25V. In these
overvoltage conditions with a 500 external VDD resistor the
part draws <55A of current into the COM pins and causes no
stress/damage to the IC. In addition all switches are OFF and the
shorted VBUS voltage will be isolated from getting through to the
other side of the switch channels, thereby protecting the USB
transceiver.
TABLE 2. LOGIC CONTROL VOLTAGE LEVELS
VDD SUPPLY RANGE
LOGIC = “0” (LOW)
LOGIC = “1” (HIGH)
OE/ALM
2.7V to 3.6V
≤0.5V
or
floating
≥1.4V
3.7V to 4.2V
≤0.7V
or
floating
≥1.7V
4.3V to 5.25V
≤0.8V
or
floating
≥2.0V
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